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From: Jiang Liu <jiang.liu@linux.intel.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Randy Dunlap <rdunlap@infradead.org>,
	Yinghai Lu <yinghai@kernel.org>,
	x86@kernel.org, Jiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Tony Luck <tony.luck@intel.com>, Joerg Roedel <joro@8bytes.org>,
	Paul Gortmaker <paul.gortmaker@windriver.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-acpi@vger.kernel.org, sfi-devel@simplefirmware.org,
	Ingo Molnar <mingo@kernel.org>
Subject: [RFC Patch Part1 V1 16/30] x86, irq: reorganize IO_APIC_get_PCI_irq_vector() to prepare for irqdomain
Date: Fri, 16 May 2014 16:05:36 +0800	[thread overview]
Message-ID: <1400227550-5935-17-git-send-email-jiang.liu@linux.intel.com> (raw)
In-Reply-To: <1400227550-5935-1-git-send-email-jiang.liu@linux.intel.com>

Reorganize function IO_APIC_get_PCI_irq_vector() a bit to better support
coming irqdomain.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
---
 arch/x86/kernel/apic/io_apic.c |   62 ++++++++++++++++++++++------------------
 1 file changed, 34 insertions(+), 28 deletions(-)

diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index b74ec1183d34..dd81b58cce95 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1012,7 +1012,7 @@ static int pin_2_irq(int idx, int apic, int pin)
 int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
 				struct io_apic_irq_attr *irq_attr)
 {
-	int ioapic_idx, i, best_guess = -1;
+	int irq, i, best_guess = -1;
 
 	apic_printk(APIC_DEBUG,
 		    "querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n",
@@ -1022,41 +1022,47 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
 			    "PCI BIOS passed nonexistent PCI bus %d!\n", bus);
 		return -1;
 	}
+
 	for (i = 0; i < mp_irq_entries; i++) {
 		int lbus = mp_irqs[i].srcbus;
+		int ioapic_idx, found = 0;
+
+		if (test_bit(lbus, mp_bus_not_pci) || (bus != lbus) ||
+		    mp_irqs[i].irqtype != mp_INT ||
+		    (slot != ((mp_irqs[i].srcbusirq >> 2) & 0x1f)))
+			continue;
 
 		for_each_ioapic(ioapic_idx)
 			if (mpc_ioapic_id(ioapic_idx) == mp_irqs[i].dstapic ||
-			    mp_irqs[i].dstapic == MP_APIC_ALL)
+			    mp_irqs[i].dstapic == MP_APIC_ALL) {
+				found = 1;
 				break;
+			}
+		if (!found)
+			continue;
 
-		if (!test_bit(lbus, mp_bus_not_pci) &&
-		    mp_irqs[i].irqtype == mp_INT &&
-		    (bus == lbus) &&
-		    (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) {
-			int irq = pin_2_irq(i, ioapic_idx, mp_irqs[i].dstirq);
-
-			if (!(ioapic_idx || IO_APIC_IRQ(irq)))
-				continue;
+		/* Skip ISA IRQs */
+		irq = pin_2_irq(i, ioapic_idx, mp_irqs[i].dstirq);
+		if (ioapic_idx == 0 && !IO_APIC_IRQ(irq))
+			continue;
 
-			if (pin == (mp_irqs[i].srcbusirq & 3)) {
-				set_io_apic_irq_attr(irq_attr, ioapic_idx,
-						     mp_irqs[i].dstirq,
-						     irq_trigger(i),
-						     irq_polarity(i));
-				return irq;
-			}
-			/*
-			 * Use the first all-but-pin matching entry as a
-			 * best-guess fuzzy result for broken mptables.
-			 */
-			if (best_guess < 0) {
-				set_io_apic_irq_attr(irq_attr, ioapic_idx,
-						     mp_irqs[i].dstirq,
-						     irq_trigger(i),
-						     irq_polarity(i));
-				best_guess = irq;
-			}
+		if (pin == (mp_irqs[i].srcbusirq & 3)) {
+			set_io_apic_irq_attr(irq_attr, ioapic_idx,
+					     mp_irqs[i].dstirq,
+					     irq_trigger(i),
+					     irq_polarity(i));
+			return irq;
+		}
+		/*
+		 * Use the first all-but-pin matching entry as a
+		 * best-guess fuzzy result for broken mptables.
+		 */
+		if (best_guess < 0) {
+			set_io_apic_irq_attr(irq_attr, ioapic_idx,
+					     mp_irqs[i].dstirq,
+					     irq_trigger(i),
+					     irq_polarity(i));
+			best_guess = irq;
 		}
 	}
 	return best_guess;
-- 
1.7.10.4


  parent reply	other threads:[~2014-05-16  8:05 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-16  8:05 [RFC Patch Part1 V1 00/30] use irqdomain to dynamically allocate IRQ for IOAPIC pin Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 01/30] genirq, trivial: improve documentation to match current implementation Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 02/30] x86, mpparse: use pr_lvl() helper utilities to replace printk(KERN_LVL) Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 03/30] x86, mpparse: simplify arch/x86/include/asm/mpspec.h Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 04/30] x86, PCI, ACPI: use kmalloc_node() to optimize for performance Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 05/30] x86, acpi, irq: kill static function irq_to_gsi() Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 06/30] x86, ACPI, trivial: minor improvements to arch/x86/kernel/acpi/boot.c Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 07/30] x86, ACPI, irq: enhance error handling in function acpi_register_gsi() Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 08/30] x86, ACPI, irq: fix possible eror in GSI to IRQ mapping for legacy IRQ Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 09/30] x86, irq, trivial: minor improvements of IRQ related code Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 10/30] x86, ioapic: kill unused global variable timer_through_8259 Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 11/30] x86, ioapic: replace get_nr_irqs_gsi() with arch_dynirq_lower_bound(0) Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 12/30] x86, ioapic: kill static variable nr_irqs_gsi Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 13/30] x86, ioapic: introduce helper utilities to walk ioapics and pins Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 14/30] x86, ioapic: use irq_cfg() instead of irq_get_chip_data() for better readability Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 15/30] x86, irq: update high address field when updating affinity for MSI IRQ Jiang Liu
2014-05-16  8:05 ` Jiang Liu [this message]
2014-05-16  8:05 ` [RFC Patch Part1 V1 17/30] x86, irq: introduce some helper utilities to improve readability Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 18/30] x86, ACPI, irq: consolidate algorithm of mapping (ioapic, pin) to IRQ number Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 19/30] x86, irq: introduce mechanisms to support dynamically allocate IRQ for IOAPIC Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 20/30] x86, irq: enhance mp_register_ioapic() to support irqdomain Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 21/30] x86, ACPI, irq: provide basic irqdomain support Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 22/30] x86, mpparse, " Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 23/30] x86, devicetree, irq: use common mechanism to support irqdomain Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 24/30] x86, SFI, irq: provide basic irqdomain support Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 25/30] x86, irq: introduce two helper functions to support irqdomain map operation Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 26/30] x86, irq, ACPI: use common irqdomain map interface to program IOAPIC pins Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 27/30] x86, irq, mpparse: " Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 28/30] x86, irq, SFI: " Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 29/30] x86, irq, devicetree: " Jiang Liu
2014-05-16  8:05 ` [RFC Patch Part1 V1 30/30] x86, irq: clean up unused IOAPIC interface Jiang Liu
2014-05-16 15:01 ` [RFC Patch Part1 V1 00/30] use irqdomain to dynamically allocate IRQ for IOAPIC pin Yinghai Lu
2014-05-18  8:58   ` Jiang Liu
2014-05-16 15:28 ` Thomas Gleixner
2014-05-18  9:36   ` Jiang Liu
2014-05-19 14:04     ` Thomas Gleixner
2014-05-19 23:35       ` Thomas Gleixner

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