From: Jiang Liu <jiang.liu@linux.intel.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Thomas Gleixner <tglx@linutronix.de>,
Grant Likely <grant.likely@linaro.org>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Bjorn Helgaas <bhelgaas@google.com>,
Randy Dunlap <rdunlap@infradead.org>,
Yinghai Lu <yinghai@kernel.org>, Len Brown <len.brown@intel.com>,
Pavel Machek <pavel@ucw.cz>,
x86@kernel.org
Cc: Jiang Liu <jiang.liu@linux.intel.com>,
Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
Andrew Morton <akpm@linux-foundation.org>,
Tony Luck <tony.luck@intel.com>, Joerg Roedel <joro@8bytes.org>,
Paul Gortmaker <paul.gortmaker@windriver.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-acpi@vger.kernel.org, linux-pm@vger.kernel.org
Subject: [Patch Part1 V2 25/29] x86, irq, ACPI: use common irqdomain map interface to program IOAPIC pins
Date: Tue, 20 May 2014 00:23:09 +0800 [thread overview]
Message-ID: <1400516594-11544-26-git-send-email-jiang.liu@linux.intel.com> (raw)
In-Reply-To: <1400516594-11544-1-git-send-email-jiang.liu@linux.intel.com>
Refine ACPI to use common irqdomain map interface to program IOAPIC pins,
so we can unify the callsite to progam IOAPIC pins.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
---
arch/x86/kernel/acpi/boot.c | 48 ++++++++++++++++---------------------------
1 file changed, 18 insertions(+), 30 deletions(-)
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 4e8566b071c1..68baa34b8346 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -332,7 +332,9 @@ static void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
static int mp_register_gsi(struct device *dev, u32 gsi, int trigger,
int polarity);
-static struct irq_domain_ops acpi_irqdomain_ops;
+static struct irq_domain_ops acpi_irqdomain_ops = {
+ .map = mp_irqdomain_map,
+};
static struct irq_domain *acpi_create_irqdomain(int idx, void *arg)
{
@@ -512,10 +514,6 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp)
int irq = map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC | IOAPIC_MAP_CHECK);
if (irq >= 0) {
-#ifdef CONFIG_X86_IO_APIC
- if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC)
- setup_IO_APIC_irq_extra(gsi);
-#endif
*irqp = irq;
return 0;
}
@@ -1047,11 +1045,7 @@ static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,
static int mp_register_gsi(struct device *dev, u32 gsi, int trigger,
int polarity)
{
- int irq;
- int ioapic;
- int ioapic_pin;
- struct io_apic_irq_attr irq_attr;
- int ret;
+ int irq, ioapic, pin, node;
if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
return gsi;
@@ -1060,35 +1054,29 @@ static int mp_register_gsi(struct device *dev, u32 gsi, int trigger,
if (acpi_gbl_FADT.sci_interrupt == gsi)
return gsi;
- irq = map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC);
- if (irq < 0)
- return ACPI_INVALID_GSI;
-
ioapic = mp_find_ioapic(gsi);
if (ioapic < 0) {
- printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
- return gsi;
+ pr_warn("No IOAPIC for GSI %u\n", gsi);
+ return ACPI_INVALID_GSI;
}
- ioapic_pin = mp_find_ioapic_pin(ioapic, gsi);
-
- if (ioapic_pin > MP_MAX_IOAPIC_PIN) {
- printk(KERN_ERR "Invalid reference to IOAPIC pin "
- "%d-%d\n", mpc_ioapic_id(ioapic),
- ioapic_pin);
- return gsi;
+ pin = mp_find_ioapic_pin(ioapic, gsi);
+ node = dev ? dev_to_node(dev) : NUMA_NO_NODE;
+ if (mp_set_pin_attr(ioapic, pin,
+ trigger == ACPI_EDGE_SENSITIVE ? 0 : 1,
+ polarity == ACPI_ACTIVE_HIGH ? 0 : 1,
+ node)) {
+ pr_warn("Failed to set pin attr for GSI%d\n", gsi);
+ return ACPI_INVALID_GSI;
}
+ irq = map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC);
+ if (irq < 0)
+ return ACPI_INVALID_GSI;
+
if (enable_update_mptable)
mp_config_acpi_gsi(dev, gsi, trigger, polarity);
- set_io_apic_irq_attr(&irq_attr, ioapic, ioapic_pin,
- trigger == ACPI_EDGE_SENSITIVE ? 0 : 1,
- polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
- ret = io_apic_set_pci_routing(dev, irq, &irq_attr);
- if (ret < 0)
- gsi = ACPI_INVALID_GSI;
-
return gsi;
}
--
1.7.10.4
next prev parent reply other threads:[~2014-05-19 16:23 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-19 16:22 [Patch Part1 V2 00/29] use irqdomain to dynamically allocate IRQ for IOAPIC Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 01/29] x86, irq: update high address field when updating affinity for MSI IRQ Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 02/29] genirq, trivial: improve documentation to match current implementation Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 03/29] x86, mpparse: use pr_lvl() helper utilities to replace printk(KERN_LVL) Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 04/29] x86, mpparse: simplify arch/x86/include/asm/mpspec.h Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 05/29] x86, PCI, ACPI: use kmalloc_node() to optimize for performance Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 06/29] x86, acpi, irq: kill static function irq_to_gsi() Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 07/29] x86, ACPI, trivial: minor improvements to arch/x86/kernel/acpi/boot.c Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 08/29] x86, ACPI, irq: enhance error handling in function acpi_register_gsi() Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 09/29] x86, ACPI, irq: fix possible eror in GSI to IRQ mapping for legacy IRQ Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 10/29] x86, irq, trivial: minor improvements of IRQ related code Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 11/29] x86, ioapic: kill unused global variable timer_through_8259 Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 12/29] x86, ioapic: kill static variable nr_irqs_gsi Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 13/29] x86, ioapic: introduce helper utilities to walk ioapics and pins Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 14/29] x86, ioapic: use irq_cfg() instead of irq_get_chip_data() for better readability Jiang Liu
2014-05-19 16:22 ` [Patch Part1 V2 15/29] x86, irq: reorganize IO_APIC_get_PCI_irq_vector() to prepare for irqdomain Jiang Liu
2014-05-19 16:23 ` [Patch Part1 V2 16/29] x86, irq: introduce some helper utilities to improve readability Jiang Liu
2014-05-19 16:23 ` [Patch Part1 V2 17/29] x86, ACPI, irq: consolidate algorithm of mapping (ioapic, pin) to IRQ number Jiang Liu
2014-05-19 16:23 ` [Patch Part1 V2 18/29] x86, irq: introduce mechanisms to support dynamically allocate IRQ for IOAPIC Jiang Liu
2014-05-19 16:23 ` [Patch Part1 V2 19/29] x86, irq: enhance mp_register_ioapic() to support irqdomain Jiang Liu
2014-05-19 16:23 ` [Patch Part1 V2 20/29] x86, ACPI, irq: provide basic irqdomain support Jiang Liu
2014-05-19 16:23 ` [Patch Part1 V2 21/29] x86, mpparse, " Jiang Liu
2014-05-19 16:23 ` [Patch Part1 V2 22/29] x86, devicetree, irq: use common mechanism to support irqdomain Jiang Liu
2014-05-19 16:23 ` [Patch Part1 V2 23/29] x86, SFI, irq: provide basic irqdomain support Jiang Liu
2014-05-19 16:23 ` [Patch Part1 V2 24/29] x86, irq: introduce two helper functions to support irqdomain map operation Jiang Liu
2014-05-19 16:23 ` Jiang Liu [this message]
2014-05-19 16:23 ` [Patch Part1 V2 26/29] x86, irq, mpparse: use common irqdomain map interface to program IOAPIC pins Jiang Liu
2014-05-19 16:23 ` [Patch Part1 V2 27/29] x86, irq, SFI: " Jiang Liu
2014-05-19 16:23 ` [Patch Part1 V2 28/29] x86, irq, devicetree: " Jiang Liu
2014-05-19 16:23 ` [Patch Part1 V2 29/29] x86, irq: clean up unused IOAPIC interface Jiang Liu
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