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From: Jiang Liu <jiang.liu@linux.intel.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Grant Likely <grant.likely@linaro.org>,
	Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Randy Dunlap <rdunlap@infradead.org>,
	Yinghai Lu <yinghai@kernel.org>,
	x86@kernel.org, Len Brown <lenb@kernel.org>,
	David Cohen <david.a.cohen@linux.intel.com>,
	Kuppuswamy Sathyanarayanan
	<sathyanarayanan.kuppuswamy@linux.intel.com>,
	Jiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Tony Luck <tony.luck@intel.com>, Joerg Roedel <joro@8bytes.org>,
	Paul Gortmaker <paul.gortmaker@windriver.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-acpi@vger.kernel.org,
	"H. Peter Anvin" <hpa@linux.intel.com>,
	sfi-devel@simplefirmware.org
Subject: [Patch V3 28/37] x86, irq, SFI: use common irqdomain map interface to program IOAPIC pins
Date: Tue, 27 May 2014 16:08:03 +0800	[thread overview]
Message-ID: <1401178092-1228-29-git-send-email-jiang.liu@linux.intel.com> (raw)
In-Reply-To: <1401178092-1228-1-git-send-email-jiang.liu@linux.intel.com>

Refine SFI to use common irqdomain map interface to program IOAPIC pins,
so we can unify the callsite to progam IOAPIC pins.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
---
 arch/x86/pci/intel_mid_pci.c      |   19 +++++-------
 arch/x86/platform/intel-mid/sfi.c |   58 ++++++++++++++++---------------------
 arch/x86/platform/sfi/sfi.c       |    4 ++-
 3 files changed, 35 insertions(+), 46 deletions(-)

diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c
index fcbdc5fac2c6..337d165c64f1 100644
--- a/arch/x86/pci/intel_mid_pci.c
+++ b/arch/x86/pci/intel_mid_pci.c
@@ -208,27 +208,22 @@ static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
 
 static int intel_mid_pci_irq_enable(struct pci_dev *dev)
 {
-	u8 pin;
-	struct io_apic_irq_attr irq_attr;
+	int polarity;
 
-	pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
+	if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER)
+		polarity = 0; /* active high */
+	else
+		polarity = 1; /* active low */
 
 	/*
 	 * MRST only have IOAPIC, the PCI irq lines are 1:1 mapped to
 	 * IOAPIC RTE entries, so we just enable RTE for the device.
 	 */
+	if (mp_set_gsi_attr(dev->irq, 1, polarity, dev_to_node(&dev->dev)))
+		return -EBUSY;
 	if (mp_map_gsi_to_irq(dev->irq, IOAPIC_MAP_ALLOC) < 0)
 		return -EBUSY;
 
-	irq_attr.ioapic = mp_find_ioapic(dev->irq);
-	irq_attr.ioapic_pin = dev->irq;
-	irq_attr.trigger = 1; /* level */
-	if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER)
-		irq_attr.polarity = 0; /* active high */
-	else
-		irq_attr.polarity = 1; /* active low */
-	io_apic_set_pci_routing(&dev->dev, dev->irq, &irq_attr);
-
 	return 0;
 }
 
diff --git a/arch/x86/platform/intel-mid/sfi.c b/arch/x86/platform/intel-mid/sfi.c
index 7161395e7de7..3c53a90fdb18 100644
--- a/arch/x86/platform/intel-mid/sfi.c
+++ b/arch/x86/platform/intel-mid/sfi.c
@@ -432,9 +432,8 @@ static int __init sfi_parse_devs(struct sfi_table_header *table)
 	struct sfi_table_simple *sb;
 	struct sfi_device_table_entry *pentry;
 	struct devs_id *dev = NULL;
-	int num, i;
-	int ioapic;
-	struct io_apic_irq_attr irq_attr;
+	int num, i, ret;
+	int polarity;
 
 	sb = (struct sfi_table_simple *)table;
 	num = SFI_GET_NUM_ENTRIES(sb, struct sfi_device_table_entry);
@@ -448,37 +447,30 @@ static int __init sfi_parse_devs(struct sfi_table_header *table)
 			 * devices, but they have separate RTE entry in IOAPIC
 			 * so we have to enable them one by one here
 			 */
-			ioapic = mp_find_ioapic(irq);
-			if (ioapic >= 0) {
-				irq_attr.ioapic = ioapic;
-				irq_attr.ioapic_pin = irq;
-				irq_attr.trigger = 1;
-				if (intel_mid_identify_cpu() ==
-						INTEL_MID_CPU_CHIP_TANGIER) {
-					if (!strncmp(pentry->name,
-							"r69001-ts-i2c", 13))
-						/* active low */
-						irq_attr.polarity = 1;
-					else if (!strncmp(pentry->name,
-							"synaptics_3202", 14))
-						/* active low */
-						irq_attr.polarity = 1;
-					else if (irq == 41)
-						/* fast_int_1 */
-						irq_attr.polarity = 1;
-					else
-						/* active high */
-						irq_attr.polarity = 0;
-				} else {
-					/* PNW and CLV go with active low */
-					irq_attr.polarity = 1;
-				}
-				WARN_ON(mp_map_gsi_to_irq(irq,
-						IOAPIC_MAP_ALLOC) < 0);
-				io_apic_set_pci_routing(NULL, irq, &irq_attr);
+			if (intel_mid_identify_cpu() ==
+					INTEL_MID_CPU_CHIP_TANGIER) {
+				if (!strncmp(pentry->name, "r69001-ts-i2c", 13))
+					/* active low */
+					polarity = 1;
+				else if (!strncmp(pentry->name,
+						"synaptics_3202", 14))
+					/* active low */
+					polarity = 1;
+				else if (irq == 41)
+					/* fast_int_1 */
+					polarity = 1;
+				else
+					/* active high */
+					polarity = 0;
+			} else {
+				/* PNW and CLV go with active low */
+				polarity = 1;
 			}
-		} else {
-			irq = 0; /* No irq */
+
+			ret = mp_set_gsi_attr(irq, 1, polarity, NUMA_NO_NODE);
+			if (ret == 0)
+				ret = mp_map_gsi_to_irq(irq, IOAPIC_MAP_ALLOC);
+			WARN_ON(ret < 0);
 		}
 
 		dev = get_device_id(pentry->type, pentry->name);
diff --git a/arch/x86/platform/sfi/sfi.c b/arch/x86/platform/sfi/sfi.c
index cda31be8dbe5..ed0e131c1202 100644
--- a/arch/x86/platform/sfi/sfi.c
+++ b/arch/x86/platform/sfi/sfi.c
@@ -71,7 +71,9 @@ static int __init sfi_parse_cpus(struct sfi_table_header *table)
 #endif /* CONFIG_X86_LOCAL_APIC */
 
 #ifdef CONFIG_X86_IO_APIC
-static struct irq_domain_ops sfi_ioapic_irqdomain_ops;
+static struct irq_domain_ops sfi_ioapic_irqdomain_ops = {
+	.map = mp_irqdomain_map,
+};
 
 static struct irq_domain *sfi_ioapic_create_irqdomain(int ioapic, void *arg)
 {
-- 
1.7.10.4


  parent reply	other threads:[~2014-05-27  8:08 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-27  8:07 [Patch V3 00/37] use irqdomain to dynamically allocate IRQ for IOAPIC Jiang Liu
2014-05-27  8:07 ` [Patch V3 01/37] x86, irq: update high address field when updating affinity for MSI IRQ Jiang Liu
2014-05-27  8:11   ` Thomas Gleixner
2014-05-27  8:50     ` Jiang Liu
2014-05-27  8:07 ` [Patch V3 02/37] genirq, trivial: improve documentation to match current implementation Jiang Liu
2014-05-27  8:07 ` [Patch V3 03/37] x86, mpparse: use pr_lvl() helper utilities to replace printk(KERN_LVL) Jiang Liu
2014-06-03  0:41   ` David Rientjes
2014-05-27  8:07 ` [Patch V3 04/37] x86, mpparse: simplify arch/x86/include/asm/mpspec.h Jiang Liu
2014-05-27  8:07 ` [Patch V3 05/37] x86, PCI, ACPI: use kmalloc_node() to optimize for performance Jiang Liu
2014-05-27 13:50   ` Bjorn Helgaas
2014-05-27 21:22   ` David Rientjes
2014-05-27  8:07 ` [Patch V3 06/37] x86, acpi, irq: kill static function irq_to_gsi() Jiang Liu
2014-05-27  8:07 ` [Patch V3 07/37] x86, ACPI, trivial: minor improvements to arch/x86/kernel/acpi/boot.c Jiang Liu
2014-05-27  8:07 ` [Patch V3 08/37] x86, ACPI, irq: enhance error handling in function acpi_register_gsi() Jiang Liu
2014-05-27  8:07 ` [Patch V3 09/37] x86, ACPI, irq: fix possible eror in GSI to IRQ mapping for legacy IRQ Jiang Liu
2014-05-27  8:07 ` [Patch V3 10/37] x86, irq, trivial: minor improvements of IRQ related code Jiang Liu
2014-05-27  8:07 ` [Patch V3 11/37] x86, ioapic: kill unused global variable timer_through_8259 Jiang Liu
2014-05-27  8:07 ` [Patch V3 12/37] x86, ioapic: kill static variable nr_irqs_gsi Jiang Liu
2014-05-27  8:07 ` [Patch V3 13/37] x86, ioapic: introduce helper utilities to walk ioapics and pins Jiang Liu
2014-05-27  8:07 ` [Patch V3 14/37] x86, ioapic: use irq_cfg() instead of irq_get_chip_data() for better readability Jiang Liu
2014-05-27  8:07 ` [Patch V3 15/37] x86, irq: reorganize IO_APIC_get_PCI_irq_vector() to prepare for irqdomain Jiang Liu
2014-05-27  8:07 ` [Patch V3 16/37] x86, irq: introduce some helper utilities to improve readability Jiang Liu
2014-05-27  8:07 ` [Patch V3 17/37] x86, ACPI, irq: consolidate algorithm of mapping (ioapic, pin) to IRQ number Jiang Liu
2014-05-27  8:07 ` [Patch V3 18/37] x86, irq, ACPI: change __acpi_register_gsi to return IRQ number instead of GSI Jiang Liu
2014-05-27  8:07 ` [Patch V3 19/37] x86, irq: introduce mechanisms to support dynamically allocate IRQ for IOAPIC Jiang Liu
2014-05-27 19:58   ` Thomas Gleixner
2014-05-28  5:01     ` Jiang Liu
2014-05-28 21:08       ` Thomas Gleixner
2014-05-28 21:22         ` Thomas Gleixner
2014-05-28  8:01     ` Sebastian Andrzej Siewior
2014-05-28 10:07       ` Thomas Gleixner
2014-05-28 10:39         ` Sebastian Andrzej Siewior
2014-06-05  7:04           ` [RFC Patch 3/3] x86, irq: count legacy IRQs by legacy_pic->nr_legacy_irqs instead of NR_IRQS_LEGACY Jiang Liu
2014-06-05  8:15             ` Thomas Gleixner
2014-05-27  8:07 ` [Patch V3 20/37] x86, irq: enhance mp_register_ioapic() to support irqdomain Jiang Liu
2014-05-27  8:07 ` [Patch V3 21/37] x86, ACPI, irq: provide basic irqdomain support Jiang Liu
2014-05-27  8:07 ` [Patch V3 22/37] x86, mpparse, " Jiang Liu
2014-05-27  8:07 ` [Patch V3 23/37] x86, SFI, " Jiang Liu
2014-05-27  8:07 ` [Patch V3 24/37] x86, devicetree, irq: use common mechanism to support irqdomain Jiang Liu
2014-05-27  8:08 ` [Patch V3 25/37] x86, irq: introduce two helper functions to support irqdomain map operation Jiang Liu
2014-05-27  8:08 ` [Patch V3 26/37] x86, irq, ACPI: use common irqdomain map interface to program IOAPIC pins Jiang Liu
2014-05-27  8:08 ` [Patch V3 27/37] x86, irq, mpparse: " Jiang Liu
2014-05-27  8:08 ` Jiang Liu [this message]
2014-05-27  8:08 ` [Patch V3 29/37] x86, irq, devicetree: " Jiang Liu
2014-05-27  8:08 ` [Patch V3 30/37] x86, irq: clean up unused IOAPIC interface Jiang Liu
2014-05-27  8:08 ` [Patch V3 31/37] x86, irq: simplify the way to handle ISA IRQ Jiang Liu
2014-05-27  8:08 ` [Patch V3 32/37] genirq: export irq_domain_disassociate() to architecture interrupt drivers Jiang Liu
2014-05-27  8:08 ` [Patch V3 33/37] x86, irq: introduce helper functions to release IOAPIC pin Jiang Liu
2014-05-27  8:08 ` [Patch V3 34/37] x86, irq, ACPI: release IOAPIC pin when PCI device is disabled Jiang Liu
2014-05-27  8:08 ` [Patch V3 35/37] x86, irq, mpparse: " Jiang Liu
2014-05-27  8:08 ` [Patch V3 36/37] x86, irq, SFI: " Jiang Liu
2014-05-27  8:08 ` [Patch V3 37/37] x86, irq, devicetree: " Jiang Liu

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