From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-we0-f176.google.com ([74.125.82.176]:59725 "EHLO mail-we0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934467AbaHZO55 (ORCPT ); Tue, 26 Aug 2014 10:57:57 -0400 From: Thierry Reding To: Bjorn Helgaas Cc: Stephen Warren , linux-pci@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/6] PCI: tegra: Fix extended configuration space mapping Date: Tue, 26 Aug 2014 16:57:42 +0200 Message-Id: <1409065064-17617-5-git-send-email-thierry.reding@gmail.com> In-Reply-To: <1409065064-17617-1-git-send-email-thierry.reding@gmail.com> References: <1409065064-17617-1-git-send-email-thierry.reding@gmail.com> Sender: linux-pci-owner@vger.kernel.org List-ID: From: Peter Daifuku The 16 chunks of 64 KiB that need to be stitched together to make up the configuration space for one bus (1 MiB) are located 24 bits (== 16 MiB) apart in physical address space. This is determined by the start of the extended register field (bits 24-27) in the physical mapping. Signed-off-by: Peter Daifuku Signed-off-by: Thierry Reding --- drivers/pci/host/pci-tegra.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c index bd53b123218b..8264bce77750 100644 --- a/drivers/pci/host/pci-tegra.c +++ b/drivers/pci/host/pci-tegra.c @@ -383,7 +383,7 @@ static struct tegra_pcie_bus *tegra_pcie_bus_alloc(struct tegra_pcie *pcie, for (i = 0; i < 16; i++) { unsigned long virt = (unsigned long)bus->area->addr + i * SZ_64K; - phys_addr_t phys = cs + i * SZ_1M + busnr * SZ_64K; + phys_addr_t phys = cs + i * SZ_16M + busnr * SZ_64K; err = ioremap_page_range(virt, virt + SZ_64K, phys, prot); if (err < 0) { -- 2.0.4