From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from foo.masarand.uk ([69.164.217.139]:56322 "EHLO foo.masarand.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751119AbaJBD7X (ORCPT ); Wed, 1 Oct 2014 23:59:23 -0400 From: matt@masarand.com To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, Vality Subject: [PATCH 16/18] Disabled bus scan time PCI IRQ assignment on ia64 Date: Thu, 2 Oct 2014 04:50:35 +0100 Message-Id: <1412221837-17452-17-git-send-email-matt@masarand.com> In-Reply-To: <1412221837-17452-1-git-send-email-matt@masarand.com> References: <1412221837-17452-1-git-send-email-matt@masarand.com> Sender: linux-pci-owner@vger.kernel.org List-ID: From: Vality Most of the architectures are switched to allocating IRQs at device_enable time instead of boot time, however ia64 does not provide an easy way of making that transition so the new code is disabled here on ia64. --- arch/ia64/pci/pci.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index 291a582..398d5d4 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c @@ -483,6 +483,9 @@ int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) { struct pci_controller *controller = bridge->bus->sysdata; + bridge->swizzle_irq = NULL; + bridge->map_irq = NULL; + ACPI_COMPANION_SET(&bridge->dev, controller->companion); return 0; } -- 2.1.0