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From: matt@masarand.com
To: bhelgaas@google.com
Cc: linux-pci@vger.kernel.org, Vality <matt@masarand.com>
Subject: [PATCH 03/18] Delayed arm setup of PCI IRQs to bus scan time
Date: Thu,  2 Oct 2014 04:50:22 +0100	[thread overview]
Message-ID: <1412221837-17452-4-git-send-email-matt@masarand.com> (raw)
In-Reply-To: <1412221837-17452-1-git-send-email-matt@masarand.com>

From: Vality <matt@masarand.com>

Currently PCI device IRQs under arm are initialised during the
pci_common_init_dev code path, this results in an extra sweep of the
PCI bus as well as causing PCI devices hot-plugged after boot to not
receive an IRQ.

This patch set defers this assignment untill the device enable phase
which prevents both these issues.

---
 arch/arm/kernel/bios32.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index 17a26c1..4dcf3f7 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -389,7 +389,7 @@ void pcibios_remove_bus(struct pci_bus *bus)
  * PCI standard swizzle is implemented on plug-in cards and Cardbus based
  * PCI extenders, so it can not be ignored.
  */
-static u8 pcibios_swizzle(struct pci_dev *dev, u8 *pin)
+u8 pcibios_swizzle(struct pci_dev *dev, u8 *pin)
 {
 	struct pci_sys_data *sys = dev->sysdata;
 	int slot, oldpin = *pin;
@@ -409,7 +409,7 @@ static u8 pcibios_swizzle(struct pci_dev *dev, u8 *pin)
 /*
  * Map a slot/pin to an IRQ.
  */
-static int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 {
 	struct pci_sys_data *sys = dev->sysdata;
 	int irq = -1;
@@ -424,6 +424,13 @@ static int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 	return irq;
 }
 
+int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
+{
+	bridge->swizzle_irq = pcibios_swizzle;
+	bridge->map_irq = pcibios_map_irq;
+	return 0;
+}
+
 static int pcibios_init_resources(int busnr, struct pci_sys_data *sys)
 {
 	int ret;
@@ -523,8 +530,6 @@ void pci_common_init_dev(struct device *parent, struct hw_pci *hw)
 	if (hw->postinit)
 		hw->postinit();
 
-	pci_fixup_irqs(pcibios_swizzle, pcibios_map_irq);
-
 	list_for_each_entry(sys, &head, node) {
 		struct pci_bus *bus = sys->bus;
 
-- 
2.1.0


  parent reply	other threads:[~2014-10-02  3:59 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-02  3:50 [PATCH V3] Delay allocation of PCI device IRQs from boot time until bus scan time to fix PCI hotplugging matt
2014-10-02  3:50 ` [PATCH 01/18] Added way to register deferred PCI IRQ assignment handlers matt
2014-10-02  3:50 ` [PATCH 02/18] Delayed x86 setup of PCI IRQs to bus scan time matt
2014-10-02  3:50 ` matt [this message]
2014-10-02  3:50 ` [PATCH 04/18] Delayed powerpc " matt
2014-10-02  3:50 ` [PATCH 05/18] Delayed sh " matt
2014-10-02  3:50 ` [PATCH 06/18] Delayed alpha " matt
2014-10-02  3:50 ` [PATCH 07/18] Delayed cris " matt
2014-10-02  3:50 ` [PATCH 08/18] Delayed frv " matt
2014-10-02  3:50 ` [PATCH 09/18] Delayed m68k " matt
2014-10-02  3:50 ` [PATCH 10/18] Delayed microblaze " matt
2014-10-02  3:50 ` [PATCH 11/18] Delayed mips " matt
2014-10-02  3:50 ` [PATCH 12/18] Delayed mn10300 " matt
2014-10-02  3:50 ` [PATCH 13/18] Delayed sparc " matt
2014-10-02  3:50 ` [PATCH 14/18] Delayed tile " matt
2014-10-02  3:50 ` [PATCH 15/18] Delayed unicore32 " matt
2014-10-02  3:50 ` [PATCH 16/18] Disabled bus scan time PCI IRQ assignment on ia64 matt
2014-10-02  3:50 ` [PATCH 17/18] Disabled bus scan time PCI IRQ assignment on parisc matt
2014-10-02  3:50 ` [PATCH 18/18] Disabled bus scan time PCI IRQ assignment on s390 matt
  -- strict thread matches above, loose matches on Subject: below --
2014-10-02  4:07 [PATCH V3] Delay allocation of PCI device IRQs from boot time until bus scan time to fix PCI hotplugging matt
2014-10-02  4:07 ` [PATCH 03/18] Delayed arm setup of PCI IRQs to bus scan time matt
2014-10-14 18:14   ` Bjorn Helgaas

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