From: Richard Zhu <richard.zhu@freescale.com>
To: <linux-pci@vger.kernel.org>
Cc: <shawn.guo@freescale.com>, <festevam@gmail.com>,
<l.stach@pengutronix.de>, <tharvey@gateworks.com>,
Richard Zhu <r65037@freescale.com>,
Richard Zhu <richard.zhu@freescale.com>
Subject: [PATCH v5 7/9] ARM: imx6sx: add syscon into gpc dts
Date: Fri, 10 Oct 2014 13:41:14 +0800 [thread overview]
Message-ID: <1412919676-25344-8-git-send-email-richard.zhu@freescale.com> (raw)
In-Reply-To: <1412919676-25344-1-git-send-email-richard.zhu@freescale.com>
From: Richard Zhu <r65037@freescale.com>
In order to manipulate gpc bits for imx6sx
pcie in driver, add syscon into gpc dts
Signed-off-by: Richard Zhu <richard.zhu@freescale.com>
---
arch/arm/boot/dts/imx6sx.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index eefedba..0c3822e 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -689,7 +689,8 @@
};
gpc: gpc@020dc000 {
- compatible = "fsl,imx6sx-gpc", "fsl,imx6q-gpc";
+ compatible = "fsl,imx6sx-gpc",
+ "fsl,imx6q-gpc", "syscon";
reg = <0x020dc000 0x4000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
};
--
1.9.1
next prev parent reply other threads:[~2014-10-10 6:11 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-10 5:41 [PATCH v5]PCI: imx6: enable pcie on imx6sx sdb and imx6qdl sabreauto Richard Zhu
2014-10-10 5:41 ` [PATCH v5 1/9] PCI: designware: refine setup_rc and add msi data restore Richard Zhu
2014-10-10 14:42 ` Murali Karicheri
2014-10-20 2:59 ` Hong-Xing.Zhu
2014-10-20 20:00 ` Murali Karicheri
2014-10-12 14:02 ` Lucas Stach
2014-10-10 5:41 ` [PATCH v5 2/9] PCI: designware: fix one potential assignment error of cfg start Richard Zhu
2014-10-10 5:41 ` [PATCH v5 3/9] PCI: imx6: wait the clocks to stabilize after ref_en Richard Zhu
2014-10-10 5:41 ` [PATCH v5 4/9] PCI: imx6: add imx6sx pcie support Richard Zhu
2014-10-10 14:55 ` Fabio Estevam
2014-10-11 8:32 ` Hong-Xing.Zhu
2014-10-12 14:27 ` Lucas Stach
2014-10-13 2:30 ` Hong-Xing.Zhu
2014-10-14 22:12 ` Lucas Stach
2014-10-10 5:41 ` [PATCH v5 5/9] ARM: imx6qdl: enable pcie on imx6qdl sabreauto Richard Zhu
2014-10-10 5:41 ` [PATCH v5 6/9] ARM: imx6: update dts and binding for imx6sx pcie Richard Zhu
2014-10-12 14:35 ` Lucas Stach
2014-10-13 2:32 ` Hong-Xing.Zhu
2014-10-10 5:41 ` Richard Zhu [this message]
2014-10-10 5:41 ` [PATCH v5 8/9] ARM: imx6sx: add imx6sx pcie related gpr bits definitions Richard Zhu
2014-10-12 14:38 ` Lucas Stach
2014-10-13 2:34 ` Hong-Xing.Zhu
2014-10-10 5:41 ` [PATCH v5 9/9] ARM: imx6sx: enable pcie on imx6sx sdb board Richard Zhu
2014-10-10 14:50 ` Fabio Estevam
2014-10-11 8:48 ` Hong-Xing.Zhu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1412919676-25344-8-git-send-email-richard.zhu@freescale.com \
--to=richard.zhu@freescale.com \
--cc=festevam@gmail.com \
--cc=l.stach@pengutronix.de \
--cc=linux-pci@vger.kernel.org \
--cc=r65037@freescale.com \
--cc=shawn.guo@freescale.com \
--cc=tharvey@gateworks.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).