From: Jiang Liu <jiang.liu@linux.intel.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Randy Dunlap <rdunlap@infradead.org>,
Yinghai Lu <yinghai@kernel.org>, Borislav Petkov <bp@alien8.de>,
Dimitri Sivanich <sivanich@sgi.com>,
x86@kernel.org, Jiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
David Cohen <david.a.cohen@linux.intel.com>,
Sander Eikelenboom <linux@eikelenboom.it>,
David Vrabel <david.vrabel@citrix.com>,
Andrew Morton <akpm@linux-foundation.org>,
Tony Luck <tony.luck@intel.com>, Joerg Roedel <joro@8bytes.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-acpi@vger.kernel.org
Subject: [Patch Part1 v7 05/38] x86/uv: Use new irqdomain interfaces to allocate/free IRQ
Date: Tue, 20 Jan 2015 11:08:08 +0800 [thread overview]
Message-ID: <1421723321-8386-6-git-send-email-jiang.liu@linux.intel.com> (raw)
In-Reply-To: <1421723321-8386-1-git-send-email-jiang.liu@linux.intel.com>
Use new irqdomain interfaces to allocate/free IRQ, so we could
kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ later.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Link: http://lkml.kernel.org/r/1416894816-23245-6-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/platform/uv/uv_irq.c | 27 +++++++++++----------------
1 file changed, 11 insertions(+), 16 deletions(-)
diff --git a/arch/x86/platform/uv/uv_irq.c b/arch/x86/platform/uv/uv_irq.c
index 0ce673645432..474912d03f40 100644
--- a/arch/x86/platform/uv/uv_irq.c
+++ b/arch/x86/platform/uv/uv_irq.c
@@ -12,6 +12,7 @@
#include <linux/rbtree.h>
#include <linux/slab.h>
#include <linux/irq.h>
+#include <linux/irqdomain.h>
#include <asm/apic.h>
#include <asm/uv/uv_irq.h>
@@ -130,24 +131,14 @@ static int
arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
unsigned long mmr_offset, int limit)
{
- const struct cpumask *eligible_cpu = cpumask_of(cpu);
struct irq_cfg *cfg = irq_cfg(irq);
unsigned long mmr_value;
struct uv_IO_APIC_route_entry *entry;
- int mmr_pnode, err;
- unsigned int dest;
+ int mmr_pnode;
BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) !=
sizeof(unsigned long));
- err = assign_irq_vector(irq, cfg, eligible_cpu);
- if (err != 0)
- return err;
-
- err = apic->cpu_mask_to_apicid_and(eligible_cpu, eligible_cpu, &dest);
- if (err != 0)
- return err;
-
if (limit == UV_AFFINITY_CPU)
irq_set_status_flags(irq, IRQ_NO_BALANCING);
else
@@ -164,7 +155,7 @@ arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
entry->polarity = 0;
entry->trigger = 0;
entry->mask = 0;
- entry->dest = dest;
+ entry->dest = cfg->dest_apicid;
mmr_pnode = uv_blade_to_pnode(mmr_blade);
uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);
@@ -238,9 +229,13 @@ uv_set_irq_affinity(struct irq_data *data, const struct cpumask *mask,
int uv_setup_irq(char *irq_name, int cpu, int mmr_blade,
unsigned long mmr_offset, int limit)
{
- int ret, irq = irq_alloc_hwirq(uv_blade_to_memory_nid(mmr_blade));
+ int ret, irq;
+ struct irq_alloc_info info;
- if (!irq)
+ init_irq_alloc_info(&info, cpumask_of(cpu));
+ irq = irq_domain_alloc_irqs(NULL, 1, uv_blade_to_memory_nid(mmr_blade),
+ &info);
+ if (irq <= 0)
return -EBUSY;
ret = arch_enable_uv_irq(irq_name, irq, cpu, mmr_blade, mmr_offset,
@@ -248,7 +243,7 @@ int uv_setup_irq(char *irq_name, int cpu, int mmr_blade,
if (ret == irq)
uv_set_irq_2_mmr_info(irq, mmr_offset, mmr_blade);
else
- irq_free_hwirq(irq);
+ irq_domain_free_irqs(irq, 1);
return ret;
}
@@ -283,6 +278,6 @@ void uv_teardown_irq(unsigned int irq)
n = n->rb_right;
}
spin_unlock_irqrestore(&uv_irq_lock, irqflags);
- irq_free_hwirq(irq);
+ irq_domain_free_irqs(irq, 1);
}
EXPORT_SYMBOL_GPL(uv_teardown_irq);
--
1.7.10.4
next prev parent reply other threads:[~2015-01-20 3:08 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-20 3:08 [Patch Part1 v7 00/38] Convert x86 to hierarchy irqdomain and stacked irqchip Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 01/38] x86/irq: Save destination CPU ID in irq_cfg Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 02/38] x86/irq: Use hierarchy irqdomain to manage CPU interrupt vectors Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 03/38] x86/hpet: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 04/38] x86/MSI: " Jiang Liu
2015-01-20 3:08 ` Jiang Liu [this message]
2015-01-20 3:08 ` [Patch Part1 v7 06/38] x86/htirq: " Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 07/38] x86/dmar: " Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 08/38] irq_remapping: Introduce new interfaces to support hierarchy irqdomain Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 09/38] irq_remapping/vt-d: Change prototypes to prepare for enabling " Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 10/38] irq_remapping/vt-d: Enhance Intel IR driver to suppport " Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 11/38] irq_remapping/amd: Enhance AMD " Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 12/38] x86/hpet: Enhance HPET IRQ to support " Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 13/38] x86/MSI: Use hierarchy irqdomain to manage MSI interrupts Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 14/38] x86/irq: Directly call native_compose_msi_msg() for DMAR IRQ Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 15/38] irq_remapping/vt-d: Clean up unused MSI related code Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 16/38] irq_remapping/amd: " Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 17/38] irq_remapping: " Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 18/38] x86/MSI: Clean up unused MSI related code and interfaces Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 19/38] iommu/vt-d: Refine the interfaces to create IRQ for DMAR unit Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 20/38] x86/irq: Use hierarchy irqdomain to manage DMAR interrupts Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 21/38] x86/htirq: Use hierarchy irqdomain to manage Hypertransport interrupts Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 22/38] x86/uv: Use hierarchy irqdomain to manage UV interrupts Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 23/38] x86/irq: Normalize x86 irq_chip name Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 24/38] x86/MSI: Simplify the way to deal with remapped MSI interrupts Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 25/38] x86/MSI: Replace msi_update_msg() with irq_chip_compose_msi_msg() Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 26/38] x86/irq: Implement irq_chip.irq_write_msi_msg for MSI/DMAR/HPET irq_chips Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 27/38] x86/irq: Simplify MSI/DMAR/HPET implementation by using common code Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 28/38] irq_remapping: Kill unused function irq_remapping_print_chip() Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 29/38] x86/intel-mid: Delay initialization of APB timer Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 30/38] x86/intel-mid, trivial: Refine code syntax for sfi_parse_mtmr() Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 31/38] x86/apb_timer: Remove unused function is_apbt_capable() Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 32/38] x86/irq: Kill unused pre_init_apic_IRQ0() Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 33/38] x86/irq: Prepare IOAPIC interfaces to support hierarchy irqdomain Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 34/38] x86/irq: Implement callbacks to enable hierarchy irqdomain on IOAPICs Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 35/38] x86/irq: Refine the way to allocate irq_cfg for legacy IRQs Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 36/38] x86/irq: Simplify the way to print IOAPIC entry Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 37/38] x86/irq: Introduce helper functions to support hierarchy irqdomain for IOAPIC Jiang Liu
2015-01-20 3:08 ` [Patch Part1 v7 38/38] x86/irq: Convert IOAPIC to use hierarchy irqdomain interfaces Jiang Liu
2015-02-03 2:51 ` [Patch Part1 v7 00/38] Convert x86 to hierarchy irqdomain and stacked irqchip Jiang Liu
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