From: Wei Yang <weiyang@linux.vnet.ibm.com>
To: bhelgaas@google.com, benh@au1.ibm.com, gwshan@linux.vnet.ibm.com
Cc: linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
Wei Yang <weiyang@linux.vnet.ibm.com>
Subject: [PATCH V15 07/21] PCI: Refresh First VF Offset and VF Stride when updating NumVFs
Date: Wed, 25 Mar 2015 13:44:43 +0800 [thread overview]
Message-ID: <1427262297-5694-8-git-send-email-weiyang@linux.vnet.ibm.com> (raw)
In-Reply-To: <1427262297-5694-1-git-send-email-weiyang@linux.vnet.ibm.com>
The First VF Offset and VF Stride fields depend on the NumVFs setting, so
refresh the cached fields in struct pci_sriov when updating NumVFs. See
the SR-IOV spec r1.1, sec 3.3.9 and 3.3.10.
[bhelgaas: changelog, remove kernel-doc comment marker]
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/iov.c | 23 +++++++++++++++++++----
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 27b98c3..a8752c2 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -31,6 +31,21 @@ static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
dev->sriov->stride * id) & 0xff;
}
+/*
+ * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
+ * change when NumVFs changes.
+ *
+ * Update iov->offset and iov->stride when NumVFs is written.
+ */
+static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
+{
+ struct pci_sriov *iov = dev->sriov;
+
+ pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
+ pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
+ pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
+}
+
static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
{
struct pci_bus *child;
@@ -253,7 +268,7 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
return rc;
}
- pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
+ pci_iov_set_numvfs(dev, nr_virtfn);
iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
pci_cfg_access_lock(dev);
pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
@@ -282,7 +297,7 @@ failed:
iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
pci_cfg_access_lock(dev);
pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
- pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0);
+ pci_iov_set_numvfs(dev, 0);
ssleep(1);
pci_cfg_access_unlock(dev);
@@ -313,7 +328,7 @@ static void sriov_disable(struct pci_dev *dev)
sysfs_remove_link(&dev->dev.kobj, "dep_link");
iov->num_VFs = 0;
- pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0);
+ pci_iov_set_numvfs(dev, 0);
}
static int sriov_init(struct pci_dev *dev, int pos)
@@ -452,7 +467,7 @@ static void sriov_restore_state(struct pci_dev *dev)
pci_update_resource(dev, i);
pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
- pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->num_VFs);
+ pci_iov_set_numvfs(dev, iov->num_VFs);
pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
msleep(100);
--
1.7.9.5
next prev parent reply other threads:[~2015-03-25 5:52 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-25 5:44 [PATCH V15 00/21] Enable SRIOV on POWER8 Wei Yang
2015-03-25 5:44 ` [PATCH V15 01/21] powerpc/pci: Refactor pci_dn Wei Yang
2015-03-25 5:44 ` [PATCH V15 02/21] powerpc/powernv: Use pci_dn, not device_node, in PCI config accessor Wei Yang
2015-03-25 5:44 ` [PATCH V15 03/21] PCI: Print more info in sriov_enable() error message Wei Yang
2015-03-25 5:44 ` [PATCH V15 04/21] PCI: Print PF SR-IOV resource that contains all VF(n) BAR space Wei Yang
2015-03-25 5:44 ` [PATCH V15 05/21] PCI: Keep individual VF BAR size in struct pci_sriov Wei Yang
2015-03-25 5:44 ` [PATCH V15 06/21] PCI: Index IOV resources in the conventional style Wei Yang
2015-03-25 5:44 ` Wei Yang [this message]
2015-03-25 5:44 ` [PATCH V15 08/21] PCI: Calculate maximum number of buses required for VFs Wei Yang
2015-03-25 5:44 ` [PATCH V15 09/21] PCI: Export pci_iov_virtfn_bus() and pci_iov_virtfn_devfn() Wei Yang
2015-03-25 5:44 ` [PATCH V15 10/21] PCI: Add pcibios_sriov_enable() and pcibios_sriov_disable() Wei Yang
2015-03-25 5:44 ` [PATCH V15 11/21] PCI: Add pcibios_iov_resource_alignment() interface Wei Yang
2015-03-25 5:44 ` [PATCH V15 12/21] PCI: Consider additional PF's IOV BAR alignment in sizing and assigning Wei Yang
2015-03-25 5:44 ` [PATCH V15 13/21] powerpc/pci: Don't unset PCI resources for VFs Wei Yang
2015-03-25 5:44 ` [PATCH V15 14/21] powerpc/powernv: Allocate struct pnv_ioda_pe iommu_table dynamically Wei Yang
2015-03-25 5:44 ` [PATCH V15 15/21] powerpc/powernv: Reserve additional space for IOV BAR according to the number of total_pe Wei Yang
2015-03-25 5:44 ` [PATCH V15 16/21] powerpc/powernv: Implement pcibios_iov_resource_alignment() on powernv Wei Yang
2015-03-25 5:44 ` [PATCH V15 17/21] powerpc/powernv: Shift VF resource with an offset Wei Yang
2015-03-25 5:44 ` [PATCH V15 18/21] powerpc/powernv: Reserve additional space for IOV BAR, with m64_per_iov supported Wei Yang
2015-03-25 5:44 ` [PATCH V15 19/21] powerpc/powernv: Group VF PE when IOV BAR is big on PHB3 Wei Yang
2015-03-25 5:44 ` [PATCH V15 20/21] powerpc/pci: Remove unused struct pci_dn.pcidev field Wei Yang
2015-03-25 5:44 ` [PATCH V15 21/21] powerpc/pci: Add PCI resource alignment documentation Wei Yang
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