From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from metis.ext.pengutronix.de ([92.198.50.35]:47830 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754932AbbIRPMm (ORCPT ); Fri, 18 Sep 2015 11:12:42 -0400 From: Lucas Stach To: Bjorn Helgaas Cc: Jingoo Han , Pratyush Anand , linux-pci@vger.kernel.org, kernel@pengutronix.de, patchwork-lst@pengutronix.de Subject: [PATCH v5 0/5] Designware host multivector MSI and 64bit MSI fixes Date: Fri, 18 Sep 2015 17:12:34 +0200 Message-Id: <1442589159-28201-1-git-send-email-l.stach@pengutronix.de> Sender: linux-pci-owner@vger.kernel.org List-ID: This is a reworked version of the multivector MSI support for the designware PCIe host controller driver. v3 added patch 2 to share more code between the single and multivector MSI code paths. While not really related to this topic patches 4+5 fix the MSI message setup to work on 64bit and 32bit PAE systems. I included them in this series as they depend on patch 2. v4 fixes the last patch to also set up the high part of the MSI target address, when calling the common DW MSI init function. v5 fixes up clashes with the PCI and MSI changes in v4.3-rc1 and fixes one build failure introduced in the last version. Regards, Lucas Lucas Stach (5): PCI: Add msi_controller setup_irqs() method for special multivector setup PCI: designware: Factor out MSI msg setup PCI: designware: Implement multivector MSI IRQ setup PCI: designware: Make get_msi_addr() return phys_addr_t, not u32 PCI: designware: Set up high part of MSI target address drivers/pci/host/pci-keystone-dw.c | 2 +- drivers/pci/host/pci-keystone.h | 2 +- drivers/pci/host/pcie-designware.c | 70 +++++++++++++++++++++++++++++++------- drivers/pci/host/pcie-designware.h | 2 +- drivers/pci/msi.c | 3 ++ include/linux/msi.h | 2 ++ 6 files changed, 65 insertions(+), 16 deletions(-) -- 2.5.1