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From: Yinghai Lu <yinghai@kernel.org>
To: Bjorn Helgaas <bhelgaas@google.com>,
	David Miller <davem@davemloft.net>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Wei Yang <weiyang@linux.vnet.ibm.com>, TJ <linux@iam.tj>,
	Yijing Wang <wangyijing@huawei.com>,
	Khalid Aziz <khalid.aziz@oracle.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	Yinghai Lu <yinghai@kernel.org>
Subject: [PATCH v8 27/61] PCI: Optimize bus min_align/size calculation during sizing
Date: Tue, 27 Oct 2015 13:55:19 -0700	[thread overview]
Message-ID: <1445979353-1728-28-git-send-email-yinghai@kernel.org> (raw)
In-Reply-To: <1445979353-1728-1-git-send-email-yinghai@kernel.org>

During bus mmio resource sizing stage, current code try to get alignment as
small as possible and use that to align size to get final size. But it does
not handle resource that size is bigger than alignment in optimal way, kernel
only use max alignment for them.

For example:
 When we have resources with align/size: 1M/2M, 512M/512M,
 current code will have bus resource min_align/size: 512M/1024M,
 but optimal value should be 256M/768M, as we can fit them into
 [256M,768M) or [512M,1280M) instead of [512M,1536M).

 0M        256M        512M       768M       1024M      1280M
 |----------|-----------|----------|----------|----------|----------|
when we have [256M,1024M)
            |---------------------------------|
            |-2M-|      |---512M--------------|
when we have [512M,1280M)
                        |--------------------------------|
                        |---512M--------------|-2M-|

For following cases that we have resource size that is bigger
than resource alignment:
1. SRIOV bar.
2. PCI bridges with children that need several MMIOs that are more than 1M.

We can keep on trying to allocate children devices resources from range
[offset, offset + aligned_size) and offset is aligned with half min_align.
If it sucesses, we can use that half min_align as new min_align.

After this patch, we get:
 align/size: 1M/2M, 2M/4M, 4M/8M, 8M/16M
 new min_align/min_size: 4M/32M, and original is 8M/32M

 align/size: 1M/2M, 2M/4M, 4M/8M
 new min_align/min_size: 2M/14M, and original is 4M/16M

 align/size: 1M/2M, 512M/512M
 new min_align/min_size: 256M/768M, and original is 512M/1024M

The real result from one system with one pcie card that has
four functions that support sriov:
 children resources with align/size:
   00800000/00800000, 00800000/00800000, 00800000/00800000,
   00800000/00800000, 00010000/00200000, 00010000/00200000,
   00010000/00200000, 00010000/00200000, 00008000/00008000,
   00008000/00008000, 00008000/00008000, 00008000/00008000,
   00004000/00080000, 00004000/00080000, 00004000/00080000,
   00004000/00080000
for the bridge:
With original code we have min_align/min_size: 00400000/02c00000,
and with this patch we have min_align/min_size: 00100000/02b00000
So min_align will be 1M instead of 4M and we even have smaller size.

-v2: Need to check more offset with every min_alignment.
-v3: skip r_size <= 1 for optional only bridge resources.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=81431
Reported-by: TJ <linux@iam.tj>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 drivers/pci/setup-bus.c | 195 ++++++++++++++++++++++++++++++++++++++----------
 1 file changed, 157 insertions(+), 38 deletions(-)

diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index ab67cdb..8f0ad46 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -30,6 +30,34 @@
 
 unsigned int pci_flags;
 
+static inline bool is_before(resource_size_t align1, resource_size_t size1,
+			     resource_size_t align2, resource_size_t size2)
+{
+	resource_size_t size1_left, size2_left;
+
+	/* big align is before small align */
+	if (align1 > align2)
+		return true;
+
+	/*
+	 * for same align:
+	 *   aligned is before not aligned
+	 *   for not aligned, big remainder is before small remainder
+	 */
+	if (align1 == align2) {
+		size1_left = size1 & (align1 - 1);
+		if (!size1_left)
+			size1_left = align1;
+		size2_left = size2 & (align2 - 1);
+		if (!size2_left)
+			size2_left = align2;
+		if (size1_left > size2_left)
+			return true;
+	}
+
+	return false;
+}
+
 struct pci_dev_resource {
 	struct list_head list;
 	struct resource *res;
@@ -1042,26 +1070,125 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
 	}
 }
 
-static inline resource_size_t calculate_mem_align(resource_size_t *aligns,
-						  int max_order)
+struct align_test_res {
+	struct list_head list;
+	struct resource res;
+	resource_size_t size;
+	resource_size_t align;
+};
+
+static void free_align_test_list(struct list_head *head)
 {
-	resource_size_t align = 0;
-	resource_size_t min_align = 0;
-	int order;
+	struct align_test_res *p, *tmp;
 
-	for (order = 0; order <= max_order; order++) {
-		resource_size_t align1 = 1;
+	list_for_each_entry_safe(p, tmp, head, list) {
+		list_del(&p->list);
+		kfree(p);
+	}
+}
 
-		align1 <<= (order + 20);
+static int add_to_align_test_list(struct list_head *head,
+				  resource_size_t align, resource_size_t size)
+{
+	struct align_test_res *tmp;
+
+	tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
+	if (!tmp)
+		return -ENOMEM;
+
+	tmp->align = align;
+	tmp->size = size;
+
+	list_add_tail(&tmp->list, head);
+
+	return 0;
+}
+
+static void sort_align_test(struct list_head *head)
+{
+	struct align_test_res *res1, *tmp_res, *res2;
 
-		if (!align)
-			min_align = align1;
-		else if (ALIGN(align + min_align, min_align) < align1)
-			min_align = align1 >> 1;
-		align += aligns[order];
+	list_for_each_entry_safe(res1, tmp_res, head, list) {
+		/* reorder it */
+		list_for_each_entry(res2, head, list) {
+			if (res2 == res1)
+				break;
+
+			if (is_before(res1->align, res1->size,
+				      res2->align, res2->size)) {
+				list_move_tail(&res1->list, &res2->list);
+				break;
+			}
+		}
+	}
+}
+
+static bool is_align_size_good(struct list_head *head,
+			resource_size_t min_align, resource_size_t size,
+			resource_size_t start)
+{
+	struct align_test_res *p;
+	struct resource root;
+
+	memset(&root, 0, sizeof(root));
+	root.start = start;
+	root.end = start + size - 1;
+
+	list_for_each_entry(p, head, list)
+		memset(&p->res, 0, sizeof(p->res));
+
+	list_for_each_entry(p, head, list)
+		if (allocate_resource(&root, &p->res, p->size,
+				0, (resource_size_t)-1ULL,
+				p->align, NULL, NULL))
+			return false;
+
+	return true;
+}
+
+static resource_size_t calculate_mem_align(struct list_head *head,
+				resource_size_t max_align, resource_size_t size,
+				resource_size_t align_low)
+{
+	struct align_test_res *p;
+	resource_size_t min_align, good_align, aligned_size, start;
+	int count = 0;
+
+	if (max_align <= align_low) {
+		good_align = align_low;
+		goto out;
 	}
 
-	return min_align;
+	good_align = max_align;
+
+	list_for_each_entry(p, head, list)
+		count++;
+
+	if (count <= 1)
+		goto out;
+
+	sort_align_test(head);
+
+	do {
+		/* check if we can use smaller align */
+		min_align = good_align >> 1;
+		aligned_size = ALIGN(size, min_align);
+
+		/* need to make sure every offset work */
+		for (start = min_align; start < max_align; start += min_align) {
+			/* checked already with last align ? */
+			if (!(start & (good_align - 1)))
+				continue;
+
+			if (!is_align_size_good(head, min_align, aligned_size,
+					       start))
+				goto out;
+		}
+		good_align = min_align;
+	} while (min_align > align_low);
+
+out:
+	return good_align;
 }
 
 /**
@@ -1091,19 +1218,17 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
 {
 	struct pci_dev *dev;
 	resource_size_t min_align, align, size, size0, size1;
-	resource_size_t aligns[18];	/* Alignments from 1Mb to 128Gb */
-	int order, max_order;
+	resource_size_t max_align = 0;
 	struct resource *b_res = find_free_bus_resource(bus,
 					mask | IORESOURCE_PREFETCH, type);
 	resource_size_t children_add_size = 0;
 	resource_size_t children_add_align = 0;
 	resource_size_t add_align = 0;
+	LIST_HEAD(align_test_list);
 
 	if (!b_res)
 		return -ENOSPC;
 
-	memset(aligns, 0, sizeof(aligns));
-	max_order = 0;
 	size = 0;
 
 	list_for_each_entry(dev, &bus->devices, bus_list) {
@@ -1130,29 +1255,20 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
 				continue;
 			}
 #endif
-			/*
-			 * aligns[0] is for 1MB (since bridge memory
-			 * windows are always at least 1MB aligned), so
-			 * keep "order" from being negative for smaller
-			 * resources.
-			 */
 			align = pci_resource_alignment(dev, r);
-			order = __ffs(align) - 20;
-			if (order < 0)
-				order = 0;
-			if (order >= ARRAY_SIZE(aligns)) {
+			if (align > (1ULL<<37)) { /*128 Gb*/
 				dev_warn(&dev->dev, "disabling BAR %d: %pR (bad alignment %#llx)\n",
-					 i, r, (unsigned long long) align);
+					i, r, (unsigned long long) align);
 				r->flags = 0;
 				continue;
 			}
+
+			if (r_size > 1)
+				add_to_align_test_list(&align_test_list,
+							align, r_size);
 			size += r_size;
-			/* Exclude ranges with size > align from
-			   calculation of the alignment. */
-			if (r_size == align)
-				aligns[order] += align;
-			if (order > max_order)
-				max_order = order;
+			if (align > max_align)
+				max_align = align;
 
 			if (realloc_head) {
 				children_add_size += get_res_add_size(realloc_head, r);
@@ -1162,9 +1278,12 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
 		}
 	}
 
-	min_align = calculate_mem_align(aligns, max_order);
-	min_align = max(min_align, window_alignment(bus, b_res->flags));
-	size0 = calculate_memsize(size, min_size, 0, resource_size(b_res), min_align);
+	max_align = max(max_align, window_alignment(bus, b_res->flags));
+	min_align = calculate_mem_align(&align_test_list, max_align, size,
+					window_alignment(bus, b_res->flags));
+	size0 = calculate_memsize(size, min_size, 0,
+				  resource_size(b_res), min_align);
+	free_align_test_list(&align_test_list);
 	add_align = max(min_align, add_align);
 	if (children_add_size > add_size)
 		add_size = children_add_size;
-- 
1.8.4.5


  parent reply	other threads:[~2015-10-27 20:55 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-27 20:54 [PATCH v8 00/61] PCI: Resource allocation cleanup for v4.4 Yinghai Lu
2015-10-27 20:54 ` [PATCH v8 01/61] sparc/PCI: Add mem64 resource parsing for root bus Yinghai Lu
2015-10-27 20:54 ` [PATCH v8 02/61] PCI: Add pci_find_root_bus_resource() Yinghai Lu
2015-10-27 20:54 ` [PATCH v8 03/61] sparc/PCI: Use correct bus address to resource offset Yinghai Lu
2015-10-27 20:54 ` [PATCH v8 04/61] sparc/PCI: Reserve legacy mmio after PCI mmio Yinghai Lu
2015-10-27 20:54 ` [PATCH v8 05/61] sparc/PCI: Add IORESOURCE_MEM_64 for 64-bit resource in OF parsing Yinghai Lu
2015-10-27 20:54 ` [PATCH v8 06/61] sparc/PCI: Keep resource idx order with bridge register number Yinghai Lu
2015-10-27 20:54 ` [PATCH v8 07/61] PCI: Kill wrong quirk about M7101 Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 08/61] PCI: Ignore BAR for ALi M1533 PCI-ISA bridge Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 09/61] powerpc/PCI: Keep resource idx order with bridge register number Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 10/61] powerpc/PCI: Add IORESOURCE_MEM_64 for 64-bit resource in OF parsing Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 11/61] OF/PCI: Add IORESOURCE_MEM_64 for 64-bit resource Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 12/61] PCI: Check pref compatible bit for mem64 resource of PCIe device Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 13/61] PCI: Only treat non-pref mmio64 as pref if all bridges have MEM_64 Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 14/61] PCI: Add has_mem64 for struct host_bridge Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 15/61] PCI: Only treat non-pref mmio64 as pref if host bridge has mmio64 Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 16/61] PCI: Restore pref MMIO allocation logic for host bridge without mmio64 Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 17/61] PCI: Don't release fixed resource for realloc Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 18/61] PCI: Claim fixed resource during remove/rescan path Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 19/61] PCI: Set resource to FIXED for LSI devices Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 20/61] PCI: Separate realloc list checking after allocation Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 21/61] PCI: Treat optional as required in first try for bridge rescan Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 22/61] PCI: Get new realloc size for bridge for last try Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 23/61] PCI: Don't release sibling bridge resources during hotplug Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 24/61] PCI: Cleanup res_to_dev_res() printout Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 25/61] PCI: Reuse res_to_dev_res() in reassign_resources_sorted() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 26/61] PCI: Use correct align for optional only resources during sorting Yinghai Lu
2015-10-27 20:55 ` Yinghai Lu [this message]
2015-10-27 20:55 ` [PATCH v8 28/61] PCI: Optimize bus align/size calculation for optional during sizing Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 29/61] PCI: Don't add too much optional size for hotplug bridge MMIO Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 30/61] PCI: Reorder resources list for required/optional resources Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 31/61] PCI: Remove duplicated code for resource sorting Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 32/61] PCI: Rename pdev_sort_resources() to pdev_assign_resources_prepare() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 33/61] PCI: Treat ROM resource as optional during realloc Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 34/61] PCI: Add debug printout during releasing partial assigned resources Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 35/61] PCI: Simplify res reference using in __assign_resources_sorted() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 36/61] PCI: Add __add_to_list() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 37/61] PCI: Cache window alignment value during bus sizing Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 38/61] PCI: Check if resource is allocated before trying to assign one Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 39/61] PCI: Separate out save_resources()/restore_resources() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 40/61] PCI: Move comment to pci_need_to_release() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 41/61] PCI: Separate required+optional assigning to another function Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 42/61] PCI: Skip required+optional if there is no optional Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 43/61] PCI: Move saved required resource list out of required+optional assigning Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 44/61] PCI: Add alt_size ressource allocation support Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 45/61] PCI: Add support for more than two alt_size entries under same bridge Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 46/61] PCI: Fix size calculation with old_size on rescan path Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 47/61] PCI: Don't add too much optional size for hotplug bridge io Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 48/61] PCI: Move ISA io port align out of calculate_iosize() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 49/61] PCI: Don't add too much io port for hotplug bridge with old size Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 50/61] PCI: Unify calculate_size() for io port and MMIO Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 51/61] PCI: Allow bridge optional only io port resource required size to be 0 Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 52/61] PCI: Unify skip_ioresource_align() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 53/61] PCI: Kill macro checking for bus io port sizing Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 54/61] resources: Split out __allocate_resource() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 55/61] resources: Make allocate_resource() return best fit resource Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 56/61] PCI, x86: Allocate from high in available window for MMIO Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 57/61] PCI: Add debug print out for min_align and alt_size Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 58/61] PCI, x86: Add pci=assign_pref_bars to reallocate pref BARs Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 59/61] PCI: Introduce resource_disabled() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 60/61] PCI: Don't set flags to 0 when assign resource fail Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 61/61] PCI: Only try to assign io port only for root bus that support it Yinghai Lu
2015-10-30 21:47 ` [PATCH v8 00/61] PCI: Resource allocation cleanup for v4.4 Khalid Aziz
2015-10-31  1:53   ` Yinghai Lu
2015-10-31 18:51     ` David Miller
2015-10-31 20:47       ` Benjamin Herrenschmidt
2015-11-23 21:31     ` Khalid Aziz
2015-11-24  2:39       ` Yinghai Lu
2015-12-01 21:23         ` Khalid Aziz
2015-12-02  4:26           ` Yinghai Lu

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