From: Yinghai Lu <yinghai@kernel.org>
To: Bjorn Helgaas <bhelgaas@google.com>,
David Miller <davem@davemloft.net>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Wei Yang <weiyang@linux.vnet.ibm.com>, TJ <linux@iam.tj>,
Yijing Wang <wangyijing@huawei.com>,
Khalid Aziz <khalid.aziz@oracle.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Yinghai Lu <yinghai@kernel.org>
Subject: [PATCH v8 56/61] PCI, x86: Allocate from high in available window for MMIO
Date: Tue, 27 Oct 2015 13:55:48 -0700 [thread overview]
Message-ID: <1445979353-1728-57-git-send-email-yinghai@kernel.org> (raw)
In-Reply-To: <1445979353-1728-1-git-send-email-yinghai@kernel.org>
Current code just use aligned start from avialable window, that could waste
big alignment from start.
We can align to the end from avialable window, so will save
start with big align to others: like second try for pref mmio
after first try already have non-pref assigned.
pci tree:
-[0000:00]-+-00.0
+-1c.0-[01-10]--+-00.0-[02-10]--+-01.0-[03]----00.0 PLX Technology, Inc. Device 87b1
| | +-02.0-[04-09]--+-00.0-[05-09]--+-01.0-[06]----00.0 PLX Technology, Inc. Device 87b1
| | | | +-02.0-[07]----00.0 Broadcom Corporation Device 8650
| | | | +-03.0-[08]--
| | | | \-04.0-[09]----00.0 Altera Corporation Device 0201
| | | +-00.1 PLX Technology, Inc. Device 87d0
| | | +-00.2 PLX Technology, Inc. Device 87d0
| | | +-00.3 PLX Technology, Inc. Device 87d0
| | | \-00.4 PLX Technology, Inc. Device 87d0
| | +-03.0-[0a-0f]--+-00.0-[0b-0f]--+-01.0-[0c]----00.0 PLX Technology, Inc. Device 87b1
| | | | +-02.0-[0d]----00.0 Broadcom Corporation Device 8650
| | | | +-03.0-[0e]--
| | | | \-04.0-[0f]----00.0 Altera Corporation Device 0201
| | | +-00.1 PLX Technology, Inc. Device 87d0
| | | +-00.2 PLX Technology, Inc. Device 87d0
| | | +-00.3 PLX Technology, Inc. Device 87d0
| | | \-00.4 PLX Technology, Inc. Device 87d0
| | \-04.0-[10]--
| +-00.1 PLX Technology, Inc. Device 87d0
| +-00.2 PLX Technology, Inc. Device 87d0
| +-00.3 PLX Technology, Inc. Device 87d0
| \-00.4 PLX Technology, Inc. Device 87d0
+-1c.3-[11]----00.0
hotplug device under 0000:02:03.0
before the patch:
pci 0000:0a:00.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 8: assigned [mem 0xb0000000-0xb01fffff] **************
pci 0000:0a:00.0: BAR 0: assigned [mem 0xb0200000-0xb023ffff]
pci 0000:0a:00.1: BAR 0: assigned [mem 0xb0240000-0xb0241fff]
pci 0000:0a:00.2: BAR 0: assigned [mem 0xb0242000-0xb0243fff]
pci 0000:0a:00.3: BAR 0: assigned [mem 0xb0244000-0xb0245fff]
pci 0000:0a:00.4: BAR 0: assigned [mem 0xb0246000-0xb0247fff]
pci 0000:0b:04.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0b:04.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0b:01.0: BAR 8: assigned [mem 0xb0000000-0xb00fffff]
pci 0000:0b:02.0: BAR 8: assigned [mem 0xb0100000-0xb01fffff]
pci 0000:0c:00.0: BAR 0: assigned [mem 0xb0000000-0xb003ffff]
pci 0000:0b:01.0: PCI bridge to [bus 0c]
pci 0000:0b:01.0: bridge window [mem 0xb0000000-0xb00fffff]
pci 0000:0d:00.0: BAR 0: assigned [mem 0xb0100000-0xb013ffff 64bit]
pci 0000:0b:02.0: PCI bridge to [bus 0d]
pci 0000:0b:02.0: bridge window [mem 0xb0100000-0xb01fffff]
pci 0000:0b:03.0: PCI bridge to [bus 0e]
pci 0000:0f:00.0: BAR 0: no space for [mem size 0x02000000 64bit pref]
pci 0000:0f:00.0: BAR 0: failed to assign [mem size 0x02000000 64bit pref]
pci 0000:0f:00.0: BAR 2: no space for [mem size 0x00010000 64bit pref]
pci 0000:0f:00.0: BAR 2: failed to assign [mem size 0x00010000 64bit pref]
pci 0000:0b:04.0: PCI bridge to [bus 0f]
pci 0000:0a:00.0: PCI bridge to [bus 0b-0f]
pci 0000:0a:00.0: bridge window [mem 0xb0000000-0xb01fffff]
pcieport 0000:02:03.0: PCI bridge to [bus 0a-0f]
pcieport 0000:02:03.0: bridge window [io 0x2000-0x2fff]
pcieport 0000:02:03.0: bridge window [mem 0xb0000000-0xb24fffff]
pcieport 0000:02:03.0: bridge window [mem 0x80200000-0x803fffff 64bit pref]
PCI: No. 2 try to assign unassigned res
pcieport 0000:02:03.0: resource 9 [mem 0x80200000-0x803fffff 64bit pref] released
pcieport 0000:02:03.0: PCI bridge to [bus 0a-0f]
pcieport 0000:02:03.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pcieport 0000:02:03.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pcieport 0000:02:03.0: BAR 9: no space for [mem size 0x02100000 64bit pref]
pcieport 0000:02:03.0: BAR 9: failed to assign [mem size 0x02100000 64bit pref]
pci 0000:0a:00.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 9: no space for [mem size 0x02100000 64bit pref] **************
pci 0000:0a:00.0: BAR 9: failed to assign [mem size 0x02100000 64bit pref]
pci 0000:0b:04.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0b:04.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0b:04.0: BAR 9: no space for [mem size 0x02100000 64bit pref] **************
pci 0000:0b:04.0: BAR 9: failed to assign [mem size 0x02100000 64bit pref]
pci 0000:0b:01.0: PCI bridge to [bus 0c]
pci 0000:0b:01.0: bridge window [mem 0xb0000000-0xb00fffff]
pci 0000:0b:02.0: PCI bridge to [bus 0d]
pci 0000:0b:02.0: bridge window [mem 0xb0100000-0xb01fffff]
pci 0000:0b:03.0: PCI bridge to [bus 0e]
pci 0000:0f:00.0: BAR 0: no space for [mem size 0x02000000 64bit pref]
pci 0000:0f:00.0: BAR 0: failed to assign [mem size 0x02000000 64bit pref]
pci 0000:0f:00.0: BAR 2: no space for [mem size 0x00010000 64bit pref]
pci 0000:0f:00.0: BAR 2: failed to assign [mem size 0x00010000 64bit pref]
pci 0000:0b:04.0: PCI bridge to [bus 0f]
pci 0000:0a:00.0: PCI bridge to [bus 0b-0f]
pci 0000:0a:00.0: bridge window [mem 0xb0000000-0xb01fffff]
pcieport 0000:02:03.0: PCI bridge to [bus 0a-0f]
pcieport 0000:02:03.0: bridge window [io 0x2000-0x2fff]
pcieport 0000:02:03.0: bridge window [mem 0xb0000000-0xb24fffff]
after the patch:
pci 0000:0a:00.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 8: assigned [mem 0xb2300000-0xb24fffff] *************
pci 0000:0a:00.0: BAR 0: assigned [mem 0xb22c0000-0xb22fffff]
pci 0000:0a:00.1: BAR 0: assigned [mem 0xb22be000-0xb22bffff]
pci 0000:0a:00.2: BAR 0: assigned [mem 0xb22bc000-0xb22bdfff]
pci 0000:0a:00.3: BAR 0: assigned [mem 0xb22ba000-0xb22bbfff]
pci 0000:0a:00.4: BAR 0: assigned [mem 0xb22b8000-0xb22b9fff]
pci 0000:0b:04.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0b:04.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0b:01.0: BAR 8: assigned [mem 0xb2400000-0xb24fffff]
pci 0000:0b:02.0: BAR 8: assigned [mem 0xb2300000-0xb23fffff]
pci 0000:0c:00.0: BAR 0: assigned [mem 0xb24c0000-0xb24fffff]
pci 0000:0b:01.0: PCI bridge to [bus 0c]
pci 0000:0b:01.0: bridge window [mem 0xb2400000-0xb24fffff]
pci 0000:0d:00.0: BAR 0: assigned [mem 0xb23c0000-0xb23fffff 64bit]
pci 0000:0b:02.0: PCI bridge to [bus 0d]
pci 0000:0b:02.0: bridge window [mem 0xb2300000-0xb23fffff]
pci 0000:0b:03.0: PCI bridge to [bus 0e]
pci 0000:0f:00.0: BAR 0: no space for [mem size 0x02000000 64bit pref]
pci 0000:0f:00.0: BAR 0: failed to assign [mem size 0x02000000 64bit pref]
pci 0000:0f:00.0: BAR 2: no space for [mem size 0x00010000 64bit pref]
pci 0000:0f:00.0: BAR 2: failed to assign [mem size 0x00010000 64bit pref]
pci 0000:0b:04.0: PCI bridge to [bus 0f]
pci 0000:0a:00.0: PCI bridge to [bus 0b-0f]
pci 0000:0a:00.0: bridge window [mem 0xb2300000-0xb24fffff]
pcieport 0000:02:03.0: PCI bridge to [bus 0a-0f]
pcieport 0000:02:03.0: bridge window [io 0x2000-0x2fff]
pcieport 0000:02:03.0: bridge window [mem 0xb0000000-0xb24fffff]
pcieport 0000:02:03.0: bridge window [mem 0x9fc00000-0x9fdfffff 64bit pref]
PCI: No. 2 try to assign unassigned res
pcieport 0000:02:03.0: resource 9 [mem 0x9fc00000-0x9fdfffff 64bit pref] released
pcieport 0000:02:03.0: PCI bridge to [bus 0a-0f]
pcieport 0000:02:03.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pcieport 0000:02:03.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pcieport 0000:02:03.0: BAR 9: no space for [mem size 0x02100000 64bit pref]
pcieport 0000:02:03.0: BAR 9: failed to assign [mem size 0x02100000 64bit pref]
pci 0000:0a:00.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 9: assigned [mem 0xb0000000-0xb20fffff 64bit pref] *********
pci 0000:0b:04.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0b:04.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0b:04.0: BAR 9: assigned [mem 0xb0000000-0xb20fffff 64bit pref] *********
pci 0000:0b:01.0: PCI bridge to [bus 0c]
pci 0000:0b:01.0: bridge window [mem 0xb2400000-0xb24fffff]
pci 0000:0b:02.0: PCI bridge to [bus 0d]
pci 0000:0b:02.0: bridge window [mem 0xb2300000-0xb23fffff]
pci 0000:0b:03.0: PCI bridge to [bus 0e]
pci 0000:0f:00.0: BAR 0: assigned [mem 0xb0000000-0xb1ffffff 64bit pref] ********
pci 0000:0f:00.0: BAR 2: assigned [mem 0xb20f0000-0xb20fffff 64bit pref] ********
pci 0000:0b:04.0: PCI bridge to [bus 0f]
pci 0000:0b:04.0: bridge window [mem 0xb0000000-0xb20fffff 64bit pref]
pci 0000:0a:00.0: PCI bridge to [bus 0b-0f]
pci 0000:0a:00.0: bridge window [mem 0xb2300000-0xb24fffff]
pci 0000:0a:00.0: bridge window [mem 0xb0000000-0xb20fffff 64bit pref]
pcieport 0000:02:03.0: PCI bridge to [bus 0a-0f]
pcieport 0000:02:03.0: bridge window [io 0x2000-0x2fff]
pcieport 0000:02:03.0: bridge window [mem 0xb0000000-0xb24fffff]
So we allocate high for 0a:00.0 and etc, and leave low range like 0xb0000000 to
0b:04.0 and 0f:00.0
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
arch/x86/pci/i386.c | 20 ++++++++++++++++++++
drivers/pci/setup-bus.c | 11 ++++++++++-
include/linux/pci.h | 3 +++
3 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 3f17726..21f3e3e 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -129,6 +129,24 @@ static void __init pcibios_fw_addr_list_del(void)
pcibios_fw_addr_done = true;
}
+resource_size_t
+pcibios_align_end_resource(void *data, const struct resource *res,
+ resource_size_t size, resource_size_t align)
+{
+ resource_size_t start = res->start;
+
+ /* Take near end */
+ if (res->end + 1 > size) {
+ resource_size_t new_start;
+
+ new_start = round_down(res->end + 1 - size, align);
+ if (new_start > start)
+ start = new_start;
+ }
+
+ return start;
+}
+
/*
* We need to avoid collisions with `mirrored' VGA ports
* and other strange ISA hardware, so we always want the
@@ -155,6 +173,8 @@ pcibios_align_resource(void *data, const struct resource *res,
if (start & 0x300)
start = (start + 0x3ff) & ~0x3ff;
} else if (res->flags & IORESOURCE_MEM) {
+ start = pcibios_align_end_resource(data, res, size, align);
+
/* The low 1MB range is reserved for ISA cards */
if (start < BIOS_END)
start = BIOS_END;
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 419eaaf..1889351 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -1319,6 +1319,15 @@ static void sort_align_test(struct list_head *head)
}
}
+resource_size_t __weak pcibios_align_end_resource(void *data,
+ const struct resource *res,
+ resource_size_t size,
+ resource_size_t align)
+{
+ /* default is not aligned to end */
+ return res->start;
+}
+
static bool is_align_size_good(struct list_head *head,
resource_size_t min_align, resource_size_t size,
resource_size_t start)
@@ -1336,7 +1345,7 @@ static bool is_align_size_good(struct list_head *head,
list_for_each_entry(p, head, list)
if (allocate_resource(&root, &p->res, p->size,
0, (resource_size_t)-1ULL,
- p->align, NULL, NULL))
+ p->align, pcibios_align_end_resource, NULL))
return false;
return true;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index cffaed4..6bc56f1 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -774,6 +774,9 @@ char *pcibios_setup(char *str);
resource_size_t pcibios_align_resource(void *, const struct resource *,
resource_size_t,
resource_size_t);
+resource_size_t pcibios_align_end_resource(void *, const struct resource *,
+ resource_size_t,
+ resource_size_t);
void pcibios_update_irq(struct pci_dev *, int irq);
/* Weak but can be overriden by arch */
--
1.8.4.5
next prev parent reply other threads:[~2015-10-27 20:55 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-27 20:54 [PATCH v8 00/61] PCI: Resource allocation cleanup for v4.4 Yinghai Lu
2015-10-27 20:54 ` [PATCH v8 01/61] sparc/PCI: Add mem64 resource parsing for root bus Yinghai Lu
2015-10-27 20:54 ` [PATCH v8 02/61] PCI: Add pci_find_root_bus_resource() Yinghai Lu
2015-10-27 20:54 ` [PATCH v8 03/61] sparc/PCI: Use correct bus address to resource offset Yinghai Lu
2015-10-27 20:54 ` [PATCH v8 04/61] sparc/PCI: Reserve legacy mmio after PCI mmio Yinghai Lu
2015-10-27 20:54 ` [PATCH v8 05/61] sparc/PCI: Add IORESOURCE_MEM_64 for 64-bit resource in OF parsing Yinghai Lu
2015-10-27 20:54 ` [PATCH v8 06/61] sparc/PCI: Keep resource idx order with bridge register number Yinghai Lu
2015-10-27 20:54 ` [PATCH v8 07/61] PCI: Kill wrong quirk about M7101 Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 08/61] PCI: Ignore BAR for ALi M1533 PCI-ISA bridge Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 09/61] powerpc/PCI: Keep resource idx order with bridge register number Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 10/61] powerpc/PCI: Add IORESOURCE_MEM_64 for 64-bit resource in OF parsing Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 11/61] OF/PCI: Add IORESOURCE_MEM_64 for 64-bit resource Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 12/61] PCI: Check pref compatible bit for mem64 resource of PCIe device Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 13/61] PCI: Only treat non-pref mmio64 as pref if all bridges have MEM_64 Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 14/61] PCI: Add has_mem64 for struct host_bridge Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 15/61] PCI: Only treat non-pref mmio64 as pref if host bridge has mmio64 Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 16/61] PCI: Restore pref MMIO allocation logic for host bridge without mmio64 Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 17/61] PCI: Don't release fixed resource for realloc Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 18/61] PCI: Claim fixed resource during remove/rescan path Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 19/61] PCI: Set resource to FIXED for LSI devices Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 20/61] PCI: Separate realloc list checking after allocation Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 21/61] PCI: Treat optional as required in first try for bridge rescan Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 22/61] PCI: Get new realloc size for bridge for last try Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 23/61] PCI: Don't release sibling bridge resources during hotplug Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 24/61] PCI: Cleanup res_to_dev_res() printout Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 25/61] PCI: Reuse res_to_dev_res() in reassign_resources_sorted() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 26/61] PCI: Use correct align for optional only resources during sorting Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 27/61] PCI: Optimize bus min_align/size calculation during sizing Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 28/61] PCI: Optimize bus align/size calculation for optional " Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 29/61] PCI: Don't add too much optional size for hotplug bridge MMIO Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 30/61] PCI: Reorder resources list for required/optional resources Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 31/61] PCI: Remove duplicated code for resource sorting Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 32/61] PCI: Rename pdev_sort_resources() to pdev_assign_resources_prepare() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 33/61] PCI: Treat ROM resource as optional during realloc Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 34/61] PCI: Add debug printout during releasing partial assigned resources Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 35/61] PCI: Simplify res reference using in __assign_resources_sorted() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 36/61] PCI: Add __add_to_list() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 37/61] PCI: Cache window alignment value during bus sizing Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 38/61] PCI: Check if resource is allocated before trying to assign one Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 39/61] PCI: Separate out save_resources()/restore_resources() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 40/61] PCI: Move comment to pci_need_to_release() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 41/61] PCI: Separate required+optional assigning to another function Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 42/61] PCI: Skip required+optional if there is no optional Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 43/61] PCI: Move saved required resource list out of required+optional assigning Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 44/61] PCI: Add alt_size ressource allocation support Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 45/61] PCI: Add support for more than two alt_size entries under same bridge Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 46/61] PCI: Fix size calculation with old_size on rescan path Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 47/61] PCI: Don't add too much optional size for hotplug bridge io Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 48/61] PCI: Move ISA io port align out of calculate_iosize() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 49/61] PCI: Don't add too much io port for hotplug bridge with old size Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 50/61] PCI: Unify calculate_size() for io port and MMIO Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 51/61] PCI: Allow bridge optional only io port resource required size to be 0 Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 52/61] PCI: Unify skip_ioresource_align() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 53/61] PCI: Kill macro checking for bus io port sizing Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 54/61] resources: Split out __allocate_resource() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 55/61] resources: Make allocate_resource() return best fit resource Yinghai Lu
2015-10-27 20:55 ` Yinghai Lu [this message]
2015-10-27 20:55 ` [PATCH v8 57/61] PCI: Add debug print out for min_align and alt_size Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 58/61] PCI, x86: Add pci=assign_pref_bars to reallocate pref BARs Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 59/61] PCI: Introduce resource_disabled() Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 60/61] PCI: Don't set flags to 0 when assign resource fail Yinghai Lu
2015-10-27 20:55 ` [PATCH v8 61/61] PCI: Only try to assign io port only for root bus that support it Yinghai Lu
2015-10-30 21:47 ` [PATCH v8 00/61] PCI: Resource allocation cleanup for v4.4 Khalid Aziz
2015-10-31 1:53 ` Yinghai Lu
2015-10-31 18:51 ` David Miller
2015-10-31 20:47 ` Benjamin Herrenschmidt
2015-11-23 21:31 ` Khalid Aziz
2015-11-24 2:39 ` Yinghai Lu
2015-12-01 21:23 ` Khalid Aziz
2015-12-02 4:26 ` Yinghai Lu
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