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From: Yinghai Lu <yinghai@kernel.org>
To: Bjorn Helgaas <bhelgaas@google.com>,
	David Miller <davem@davemloft.net>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Wei Yang <weiyang@linux.vnet.ibm.com>, TJ <linux@iam.tj>,
	Yijing Wang <wangyijing@huawei.com>,
	Khalid Aziz <khalid.aziz@oracle.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	Yinghai Lu <yinghai@kernel.org>
Subject: [PATCH v9 11/60] PCI: Check pref compatible bit for mem64 resource of PCIe device
Date: Thu, 10 Dec 2015 21:06:07 -0800	[thread overview]
Message-ID: <1449810416-2950-12-git-send-email-yinghai@kernel.org> (raw)
In-Reply-To: <1449810416-2950-1-git-send-email-yinghai@kernel.org>

We still get "no compatible bridge window" warning on sparc T5-8
after we add support for 64bit resource parsing for root bus.

 PCI: scan_bus[/pci@300/pci@1/pci@0/pci@6] bus no 8
 PCI: Claiming 0000:00:01.0: Resource 15: 0000800100000000..00008004afffffff [220c]
 PCI: Claiming 0000:01:00.0: Resource 15: 0000800100000000..00008004afffffff [220c]
 PCI: Claiming 0000:02:04.0: Resource 15: 0000800100000000..000080012fffffff [220c]
 PCI: Claiming 0000:03:00.0: Resource 15: 0000800100000000..000080012fffffff [220c]
 PCI: Claiming 0000:04:06.0: Resource 14: 0000800100000000..000080010fffffff [220c]
 PCI: Claiming 0000:05:00.0: Resource 0: 0000800100000000..0000800100001fff [204]
 pci 0000:05:00.0: can't claim BAR 0 [mem 0x800100000000-0x800100001fff]: no compatible bridge window

All the bridges 64-bit resource have pref bit, but the device resource does not
have pref set, then we can not find parent for the device resource,
as we can not put non-pref mem under pref mem.

According to pcie spec errta
https://www.pcisig.com/specifications/pciexpress/base2/PCIe_Base_r2.1_Errata_08Jun10.pdf
page 13, in some case it is ok to mark some as pref.

Mark if the entire path from the host to the adapter is over PCI Express.
Then set pref compatible bit for claim/sizing/assign for 64bit mem resource
on that pcie device.

-v2: set pref for mmio 64 when whole path is PCI Express, according to David Miller.
-v3: don't set pref directly, change to UNDER_PREF, and set PREF before
     sizing and assign resource, and cleart PREF afterwards. requested by BenH.
-v4: use on_all_pcie_path device flag instead.
-v5: update after pci_find_root_bus_resource() change

Fixes: commit d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows")
Link: http://lkml.kernel.org/r/CAE9FiQU1gJY1LYrxs+ma5LCTEEe4xmtjRG0aXJ9K_Tsu+m9Wuw@mail.gmail.com
Reported-by: David Ahern <david.ahern@oracle.com>
Tested-by: David Ahern <david.ahern@oracle.com>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=81431
Tested-by: TJ <linux@iam.tj>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Tested-by: Khalid Aziz <khalid.aziz@oracle.com>
---
 drivers/pci/pci.c       | 10 ++++++----
 drivers/pci/pci.h       |  2 ++
 drivers/pci/probe.c     | 33 +++++++++++++++++++++++++++++++++
 drivers/pci/setup-bus.c | 23 +++++++++++++++++++----
 drivers/pci/setup-res.c |  4 ++++
 include/linux/pci.h     |  1 +
 6 files changed, 65 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index c8cae87..6bc3d7e 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -416,7 +416,7 @@ int pci_find_ht_capability(struct pci_dev *dev, int ht_cap)
 EXPORT_SYMBOL_GPL(pci_find_ht_capability);
 
 static struct resource *pci_find_bus_resource(const struct pci_bus *bus,
-					      struct resource *res)
+					      struct resource *res, int flags)
 {
 	struct resource *r;
 	int i;
@@ -431,7 +431,7 @@ static struct resource *pci_find_bus_resource(const struct pci_bus *bus,
 			 * not, the allocator made a mistake.
 			 */
 			if (r->flags & IORESOURCE_PREFETCH &&
-			    !(res->flags & IORESOURCE_PREFETCH))
+			    !(flags & IORESOURCE_PREFETCH))
 				return NULL;
 
 			/*
@@ -459,7 +459,9 @@ static struct resource *pci_find_bus_resource(const struct pci_bus *bus,
 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
 					  struct resource *res)
 {
-	return pci_find_bus_resource(dev->bus, res);
+	int flags = pci_resource_pref_compatible(dev, res);
+
+	return pci_find_bus_resource(dev->bus, res, flags);
 }
 EXPORT_SYMBOL(pci_find_parent_resource);
 
@@ -469,7 +471,7 @@ struct resource *pci_find_root_bus_resource(struct pci_bus *bus,
 	while (bus->parent)
 		bus = bus->parent;
 
-	return pci_find_bus_resource(bus, res);
+	return pci_find_bus_resource(bus, res, res->flags);
 }
 
 /**
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index d390fc1..e479f3a 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -337,4 +337,6 @@ static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
 }
 #endif
 
+int pci_resource_pref_compatible(const struct pci_dev *dev,
+				 struct resource *res);
 #endif /* DRIVERS_PCI_H */
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index edb1984..6faabe3 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1702,6 +1702,36 @@ static void pci_dma_configure(struct pci_dev *dev)
 	pci_put_host_bridge_device(bridge);
 }
 
+static bool pci_up_path_over_pcie(struct pci_bus *bus)
+{
+	if (pci_is_root_bus(bus))
+		return true;
+
+	if (bus->self && !pci_is_pcie(bus->self))
+		return false;
+
+	return pci_up_path_over_pcie(bus->parent);
+}
+
+/*
+ * According to
+ * https://www.pcisig.com/specifications/pciexpress/base2/PCIe_Base_r2.1_Errata_08Jun10.pdf
+ * page 13, system firmware could put some 64bit non-pref under 64bit pref,
+ * on some cases.
+ * Let's mark if entire path from the host to the adapter is over PCI
+ * Express. later will use that compute pref compaitable bit.
+ */
+static void pci_set_on_all_pcie_path(struct pci_dev *dev)
+{
+	if (!pci_is_pcie(dev))
+		return;
+
+	if (!pci_up_path_over_pcie(dev->bus))
+		return;
+
+	dev->on_all_pcie_path = 1;
+}
+
 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
 {
 	int ret;
@@ -1732,6 +1762,9 @@ void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
 	/* Initialize various capabilities */
 	pci_init_capabilities(dev);
 
+	/* After pcie_cap is assigned */
+	pci_set_on_all_pcie_path(dev);
+
 	/*
 	 * Add the device to our list of discovered devices
 	 * and the bus list for fixup functions, etc.
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 1723ac1..198f754a 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -739,6 +739,20 @@ int pci_claim_bridge_resource(struct pci_dev *bridge, int i)
 	return -EINVAL;
 }
 
+int pci_resource_pref_compatible(const struct pci_dev *dev,
+				 struct resource *res)
+{
+	if (res->flags & IORESOURCE_PREFETCH)
+		return res->flags;
+
+	if ((res->flags & IORESOURCE_MEM) &&
+	    (res->flags & IORESOURCE_MEM_64) &&
+	    dev->on_all_pcie_path)
+		return res->flags | IORESOURCE_PREFETCH;
+
+	return res->flags;
+}
+
 /* Check whether the bridge supports optional I/O and
    prefetchable memory ranges. If not, the respective
    base/limit registers must be read-only and read as 0. */
@@ -1036,11 +1050,12 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
 		for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 			struct resource *r = &dev->resource[i];
 			resource_size_t r_size;
+			int flags = pci_resource_pref_compatible(dev, r);
 
-			if (r->parent || (r->flags & IORESOURCE_PCI_FIXED) ||
-			    ((r->flags & mask) != type &&
-			     (r->flags & mask) != type2 &&
-			     (r->flags & mask) != type3))
+			if (r->parent || (flags & IORESOURCE_PCI_FIXED) ||
+			    ((flags & mask) != type &&
+			     (flags & mask) != type2 &&
+			     (flags & mask) != type3))
 				continue;
 			r_size = resource_size(r);
 #ifdef CONFIG_PCI_IOV
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index 604011e..d5b3970 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -257,15 +257,19 @@ static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
 static int _pci_assign_resource(struct pci_dev *dev, int resno,
 				resource_size_t size, resource_size_t min_align)
 {
+	struct resource *res = dev->resource + resno;
+	int old_flags = res->flags;
 	struct pci_bus *bus;
 	int ret;
 
+	res->flags = pci_resource_pref_compatible(dev, res);
 	bus = dev->bus;
 	while ((ret = __pci_assign_resource(bus, dev, resno, size, min_align))) {
 		if (!bus->parent || !bus->self->transparent)
 			break;
 		bus = bus->parent;
 	}
+	res->flags = old_flags;
 
 	return ret;
 }
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 8b3896b..f96f86a 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -311,6 +311,7 @@ struct pci_dev {
 						   powered on/off by the
 						   corresponding bridge */
 	unsigned int	ignore_hotplug:1;	/* Ignore hotplug events */
+	unsigned int	on_all_pcie_path:1;	/* up to host-bridge all pcie */
 	unsigned int	d3_delay;	/* D3->D0 transition time in ms */
 	unsigned int	d3cold_delay;	/* D3cold->D0 transition time in ms */
 
-- 
1.8.4.5


  parent reply	other threads:[~2015-12-11  5:12 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-11  5:05 [PATCH v9 00/60] PCI: Resource allocation cleanup for v4.5 Yinghai Lu
2015-12-11  5:05 ` [PATCH v9 01/60] PCI: Add pci_find_root_bus_resource() Yinghai Lu
2015-12-11  5:05 ` [PATCH v9 02/60] sparc/PCI: Use correct bus address to resource offset Yinghai Lu
2015-12-11  5:05 ` [PATCH v9 03/60] sparc/PCI: Reserve legacy mmio after PCI mmio Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 04/60] sparc/PCI: Add IORESOURCE_MEM_64 for 64-bit resource in OF parsing Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 05/60] sparc/PCI: Keep resource idx order with bridge register number Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 06/60] PCI: Kill wrong quirk about M7101 Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 07/60] PCI: Ignore BAR for ALi M1533 PCI-ISA bridge Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 08/60] powerpc/PCI: Keep resource idx order with bridge register number Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 09/60] powerpc/PCI: Add IORESOURCE_MEM_64 for 64-bit resource in OF parsing Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 10/60] OF/PCI: Add IORESOURCE_MEM_64 for 64-bit resource Yinghai Lu
2015-12-11  5:06 ` Yinghai Lu [this message]
2015-12-11  5:06 ` [PATCH v9 12/60] PCI: Only treat non-pref mmio64 as pref if all bridges have MEM_64 Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 13/60] PCI: Add has_mem64 for struct host_bridge Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 14/60] PCI: Only treat non-pref mmio64 as pref if host bridge has mmio64 Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 15/60] PCI: Restore pref MMIO allocation logic for host bridge without mmio64 Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 16/60] PCI: Don't release fixed resource for realloc Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 17/60] PCI: Claim fixed resource during remove/rescan path Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 18/60] PCI: Set resource to FIXED for LSI devices Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 19/60] PCI: Separate realloc list checking after allocation Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 20/60] PCI: Treat optional as required in first try for bridge rescan Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 21/60] PCI: Get new realloc size for bridge for last try Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 22/60] PCI: Don't release sibling bridge resources during hotplug Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 23/60] PCI: Cleanup res_to_dev_res() printout Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 24/60] PCI: Reuse res_to_dev_res() in reassign_resources_sorted() Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 25/60] PCI: Use correct align for optional only resources during sorting Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 26/60] PCI: Optimize bus min_align/size calculation during sizing Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 27/60] PCI: Optimize bus align/size calculation for optional " Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 28/60] PCI: Don't add too much optional size for hotplug bridge MMIO Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 29/60] PCI: Reorder resources list for required/optional resources Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 30/60] PCI: Remove duplicated code for resource sorting Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 31/60] PCI: Rename pdev_sort_resources() to pdev_assign_resources_prepare() Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 32/60] PCI: Treat ROM resource as optional during realloc Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 33/60] PCI: Add debug printout during releasing partial assigned resources Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 34/60] PCI: Simplify res reference using in __assign_resources_sorted() Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 35/60] PCI: Add __add_to_list() Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 36/60] PCI: Cache window alignment value during bus sizing Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 37/60] PCI: Check if resource is allocated before trying to assign one Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 38/60] PCI: Separate out save_resources()/restore_resources() Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 39/60] PCI: Move comment to pci_need_to_release() Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 40/60] PCI: Separate required+optional assigning to another function Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 41/60] PCI: Skip required+optional if there is no optional Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 42/60] PCI: Move saved required resource list out of required+optional assigning Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 43/60] PCI: Add alt_size ressource allocation support Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 44/60] PCI: Add support for more than two alt_size entries under same bridge Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 45/60] PCI: Fix size calculation with old_size on rescan path Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 46/60] PCI: Don't add too much optional size for hotplug bridge io Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 47/60] PCI: Move ISA io port align out of calculate_iosize() Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 48/60] PCI: Don't add too much io port for hotplug bridge with old size Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 49/60] PCI: Unify calculate_size() for io port and MMIO Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 50/60] PCI: Allow bridge optional only io port resource required size to be 0 Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 51/60] PCI: Unify skip_ioresource_align() Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 52/60] PCI: Kill macro checking for bus io port sizing Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 53/60] resources: Split out __allocate_resource() Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 54/60] resources: Make allocate_resource() return best fit resource Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 55/60] PCI, x86: Allocate from high in available window for MMIO Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 56/60] PCI: Add debug print out for min_align and alt_size Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 57/60] PCI, x86: Add pci=assign_pref_bars to reallocate pref BARs Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 58/60] PCI: Introduce resource_disabled() Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 59/60] PCI: Don't set flags to 0 when assign resource fail Yinghai Lu
2015-12-11  5:06 ` [PATCH v9 60/60] PCI: Only try to assign io port only for root bus that support it Yinghai Lu

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