From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mailapp01.imgtec.com ([195.59.15.196]:9762 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752803AbcBDQKe (ORCPT ); Thu, 4 Feb 2016 11:10:34 -0500 From: Paul Burton To: CC: Bharat Kumar Gogada , Michal Simek , Ravikiran Gummaluri , "Paul Burton" , Ley Foon Tan , "Arnd Bergmann" , Grygorii Strashko , Russell Joyce , Bjorn Helgaas , , Jingoo Han , Geert Uytterhoeven , Ray Jui , =?UTF-8?q?S=C3=B6ren=20Brinkmann?= , Scott Branden , "Thomas Gleixner" , Phil Edworthy , Hauke Mehrtens , Jiang Liu , "Rob Herring" , Duc Dang , Gabriele Paoloni , , Lorenzo Pieralisi , , Stanimir Varbanov , Marc Zyngier Subject: [PATCH v3 0/6] Xilinx AXI PCIe Host Bridge driver fixes Date: Thu, 4 Feb 2016 16:10:07 +0000 Message-ID: <1454602213-967-1-git-send-email-paul.burton@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-pci-owner@vger.kernel.org List-ID: This series fixes a number of issues found using the Xilinx AXI PCIe Host Bridge IP on the Imagination Technologies MIPS Boston development board. It has been split out of the larger Boston board support series at Michal's request. Applies atop v4.5-rc2. Paul Burton (6): PCI: xilinx: Keep references to both IRQ domains PCI: xilinx: Unify INTx & MSI interrupt FIFO decode PCI: xilinx: Always clear interrupt decode register PCI: xilinx: Clear interrupt FIFO during probe PCI: xilinx: Fix INTX irq dispatch PCI: xilinx: Allow build on MIPS platforms drivers/pci/host/Kconfig | 2 +- drivers/pci/host/pcie-xilinx.c | 125 +++++++++++++++++++---------------------- 2 files changed, 60 insertions(+), 67 deletions(-) -- 2.7.0