From: Yinghai Lu <yinghai@kernel.org>
To: Bjorn Helgaas <bhelgaas@google.com>,
David Miller <davem@davemloft.net>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Linus Torvalds <torvalds@linux-foundation.org>
Cc: Wei Yang <weiyang@linux.vnet.ibm.com>, TJ <linux@iam.tj>,
Yijing Wang <wangyijing@huawei.com>,
Khalid Aziz <khalid.aziz@oracle.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Yinghai Lu <yinghai@kernel.org>
Subject: [PATCH v11 55/60] PCI, x86: Allocate from high in available window for MMIO
Date: Thu, 7 Apr 2016 17:16:08 -0700 [thread overview]
Message-ID: <1460074573-7481-56-git-send-email-yinghai@kernel.org> (raw)
In-Reply-To: <1460074573-7481-1-git-send-email-yinghai@kernel.org>
Current code just use aligned start from avialable window, that could waste
big alignment from start.
We can align to the end from avialable window, so will save
start with big align to others: like second try for pref mmio
after first try already have non-pref assigned.
pci tree:
-[0000:00]-+-00.0
+-1c.0-[01-10]--+-00.0-[02-10]--+-01.0-[03]----00.0 PLX Technology, Inc. Device 87b1
| | +-02.0-[04-09]--+-00.0-[05-09]--+-01.0-[06]----00.0 PLX Technology, Inc. Device 87b1
| | | | +-02.0-[07]----00.0 Broadcom Corporation Device 8650
| | | | +-03.0-[08]--
| | | | \-04.0-[09]----00.0 Altera Corporation Device 0201
| | | +-00.1 PLX Technology, Inc. Device 87d0
| | | +-00.2 PLX Technology, Inc. Device 87d0
| | | +-00.3 PLX Technology, Inc. Device 87d0
| | | \-00.4 PLX Technology, Inc. Device 87d0
| | +-03.0-[0a-0f]--+-00.0-[0b-0f]--+-01.0-[0c]----00.0 PLX Technology, Inc. Device 87b1
| | | | +-02.0-[0d]----00.0 Broadcom Corporation Device 8650
| | | | +-03.0-[0e]--
| | | | \-04.0-[0f]----00.0 Altera Corporation Device 0201
| | | +-00.1 PLX Technology, Inc. Device 87d0
| | | +-00.2 PLX Technology, Inc. Device 87d0
| | | +-00.3 PLX Technology, Inc. Device 87d0
| | | \-00.4 PLX Technology, Inc. Device 87d0
| | \-04.0-[10]--
| +-00.1 PLX Technology, Inc. Device 87d0
| +-00.2 PLX Technology, Inc. Device 87d0
| +-00.3 PLX Technology, Inc. Device 87d0
| \-00.4 PLX Technology, Inc. Device 87d0
+-1c.3-[11]----00.0
hotplug device under 0000:02:03.0
before the patch:
pci 0000:0a:00.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 8: assigned [mem 0xb0000000-0xb01fffff] **************
pci 0000:0a:00.0: BAR 0: assigned [mem 0xb0200000-0xb023ffff]
pci 0000:0a:00.1: BAR 0: assigned [mem 0xb0240000-0xb0241fff]
pci 0000:0a:00.2: BAR 0: assigned [mem 0xb0242000-0xb0243fff]
pci 0000:0a:00.3: BAR 0: assigned [mem 0xb0244000-0xb0245fff]
pci 0000:0a:00.4: BAR 0: assigned [mem 0xb0246000-0xb0247fff]
pci 0000:0b:04.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0b:04.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0b:01.0: BAR 8: assigned [mem 0xb0000000-0xb00fffff]
pci 0000:0b:02.0: BAR 8: assigned [mem 0xb0100000-0xb01fffff]
pci 0000:0c:00.0: BAR 0: assigned [mem 0xb0000000-0xb003ffff]
pci 0000:0b:01.0: PCI bridge to [bus 0c]
pci 0000:0b:01.0: bridge window [mem 0xb0000000-0xb00fffff]
pci 0000:0d:00.0: BAR 0: assigned [mem 0xb0100000-0xb013ffff 64bit]
pci 0000:0b:02.0: PCI bridge to [bus 0d]
pci 0000:0b:02.0: bridge window [mem 0xb0100000-0xb01fffff]
pci 0000:0b:03.0: PCI bridge to [bus 0e]
pci 0000:0f:00.0: BAR 0: no space for [mem size 0x02000000 64bit pref]
pci 0000:0f:00.0: BAR 0: failed to assign [mem size 0x02000000 64bit pref]
pci 0000:0f:00.0: BAR 2: no space for [mem size 0x00010000 64bit pref]
pci 0000:0f:00.0: BAR 2: failed to assign [mem size 0x00010000 64bit pref]
pci 0000:0b:04.0: PCI bridge to [bus 0f]
pci 0000:0a:00.0: PCI bridge to [bus 0b-0f]
pci 0000:0a:00.0: bridge window [mem 0xb0000000-0xb01fffff]
pcieport 0000:02:03.0: PCI bridge to [bus 0a-0f]
pcieport 0000:02:03.0: bridge window [io 0x2000-0x2fff]
pcieport 0000:02:03.0: bridge window [mem 0xb0000000-0xb24fffff]
pcieport 0000:02:03.0: bridge window [mem 0x80200000-0x803fffff 64bit pref]
PCI: No. 2 try to assign unassigned res
pcieport 0000:02:03.0: resource 9 [mem 0x80200000-0x803fffff 64bit pref] released
pcieport 0000:02:03.0: PCI bridge to [bus 0a-0f]
pcieport 0000:02:03.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pcieport 0000:02:03.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pcieport 0000:02:03.0: BAR 9: no space for [mem size 0x02100000 64bit pref]
pcieport 0000:02:03.0: BAR 9: failed to assign [mem size 0x02100000 64bit pref]
pci 0000:0a:00.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 9: no space for [mem size 0x02100000 64bit pref] **************
pci 0000:0a:00.0: BAR 9: failed to assign [mem size 0x02100000 64bit pref]
pci 0000:0b:04.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0b:04.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0b:04.0: BAR 9: no space for [mem size 0x02100000 64bit pref] **************
pci 0000:0b:04.0: BAR 9: failed to assign [mem size 0x02100000 64bit pref]
pci 0000:0b:01.0: PCI bridge to [bus 0c]
pci 0000:0b:01.0: bridge window [mem 0xb0000000-0xb00fffff]
pci 0000:0b:02.0: PCI bridge to [bus 0d]
pci 0000:0b:02.0: bridge window [mem 0xb0100000-0xb01fffff]
pci 0000:0b:03.0: PCI bridge to [bus 0e]
pci 0000:0f:00.0: BAR 0: no space for [mem size 0x02000000 64bit pref]
pci 0000:0f:00.0: BAR 0: failed to assign [mem size 0x02000000 64bit pref]
pci 0000:0f:00.0: BAR 2: no space for [mem size 0x00010000 64bit pref]
pci 0000:0f:00.0: BAR 2: failed to assign [mem size 0x00010000 64bit pref]
pci 0000:0b:04.0: PCI bridge to [bus 0f]
pci 0000:0a:00.0: PCI bridge to [bus 0b-0f]
pci 0000:0a:00.0: bridge window [mem 0xb0000000-0xb01fffff]
pcieport 0000:02:03.0: PCI bridge to [bus 0a-0f]
pcieport 0000:02:03.0: bridge window [io 0x2000-0x2fff]
pcieport 0000:02:03.0: bridge window [mem 0xb0000000-0xb24fffff]
after the patch:
pci 0000:0a:00.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 8: assigned [mem 0xb2300000-0xb24fffff] *************
pci 0000:0a:00.0: BAR 0: assigned [mem 0xb22c0000-0xb22fffff]
pci 0000:0a:00.1: BAR 0: assigned [mem 0xb22be000-0xb22bffff]
pci 0000:0a:00.2: BAR 0: assigned [mem 0xb22bc000-0xb22bdfff]
pci 0000:0a:00.3: BAR 0: assigned [mem 0xb22ba000-0xb22bbfff]
pci 0000:0a:00.4: BAR 0: assigned [mem 0xb22b8000-0xb22b9fff]
pci 0000:0b:04.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0b:04.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0b:01.0: BAR 8: assigned [mem 0xb2400000-0xb24fffff]
pci 0000:0b:02.0: BAR 8: assigned [mem 0xb2300000-0xb23fffff]
pci 0000:0c:00.0: BAR 0: assigned [mem 0xb24c0000-0xb24fffff]
pci 0000:0b:01.0: PCI bridge to [bus 0c]
pci 0000:0b:01.0: bridge window [mem 0xb2400000-0xb24fffff]
pci 0000:0d:00.0: BAR 0: assigned [mem 0xb23c0000-0xb23fffff 64bit]
pci 0000:0b:02.0: PCI bridge to [bus 0d]
pci 0000:0b:02.0: bridge window [mem 0xb2300000-0xb23fffff]
pci 0000:0b:03.0: PCI bridge to [bus 0e]
pci 0000:0f:00.0: BAR 0: no space for [mem size 0x02000000 64bit pref]
pci 0000:0f:00.0: BAR 0: failed to assign [mem size 0x02000000 64bit pref]
pci 0000:0f:00.0: BAR 2: no space for [mem size 0x00010000 64bit pref]
pci 0000:0f:00.0: BAR 2: failed to assign [mem size 0x00010000 64bit pref]
pci 0000:0b:04.0: PCI bridge to [bus 0f]
pci 0000:0a:00.0: PCI bridge to [bus 0b-0f]
pci 0000:0a:00.0: bridge window [mem 0xb2300000-0xb24fffff]
pcieport 0000:02:03.0: PCI bridge to [bus 0a-0f]
pcieport 0000:02:03.0: bridge window [io 0x2000-0x2fff]
pcieport 0000:02:03.0: bridge window [mem 0xb0000000-0xb24fffff]
pcieport 0000:02:03.0: bridge window [mem 0x9fc00000-0x9fdfffff 64bit pref]
PCI: No. 2 try to assign unassigned res
pcieport 0000:02:03.0: resource 9 [mem 0x9fc00000-0x9fdfffff 64bit pref] released
pcieport 0000:02:03.0: PCI bridge to [bus 0a-0f]
pcieport 0000:02:03.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pcieport 0000:02:03.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pcieport 0000:02:03.0: BAR 9: no space for [mem size 0x02100000 64bit pref]
pcieport 0000:02:03.0: BAR 9: failed to assign [mem size 0x02100000 64bit pref]
pci 0000:0a:00.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0a:00.0: BAR 9: assigned [mem 0xb0000000-0xb20fffff 64bit pref] *********
pci 0000:0b:04.0: BAR 9: no space for [mem size 0x03000000 64bit pref]
pci 0000:0b:04.0: BAR 9: failed to assign [mem size 0x03000000 64bit pref]
pci 0000:0b:04.0: BAR 9: assigned [mem 0xb0000000-0xb20fffff 64bit pref] *********
pci 0000:0b:01.0: PCI bridge to [bus 0c]
pci 0000:0b:01.0: bridge window [mem 0xb2400000-0xb24fffff]
pci 0000:0b:02.0: PCI bridge to [bus 0d]
pci 0000:0b:02.0: bridge window [mem 0xb2300000-0xb23fffff]
pci 0000:0b:03.0: PCI bridge to [bus 0e]
pci 0000:0f:00.0: BAR 0: assigned [mem 0xb0000000-0xb1ffffff 64bit pref] ********
pci 0000:0f:00.0: BAR 2: assigned [mem 0xb20f0000-0xb20fffff 64bit pref] ********
pci 0000:0b:04.0: PCI bridge to [bus 0f]
pci 0000:0b:04.0: bridge window [mem 0xb0000000-0xb20fffff 64bit pref]
pci 0000:0a:00.0: PCI bridge to [bus 0b-0f]
pci 0000:0a:00.0: bridge window [mem 0xb2300000-0xb24fffff]
pci 0000:0a:00.0: bridge window [mem 0xb0000000-0xb20fffff 64bit pref]
pcieport 0000:02:03.0: PCI bridge to [bus 0a-0f]
pcieport 0000:02:03.0: bridge window [io 0x2000-0x2fff]
pcieport 0000:02:03.0: bridge window [mem 0xb0000000-0xb24fffff]
So we allocate high for 0a:00.0 and etc, and leave low range like 0xb0000000 to
0b:04.0 and 0f:00.0
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
arch/x86/pci/i386.c | 20 ++++++++++++++++++++
drivers/pci/setup-bus.c | 11 ++++++++++-
include/linux/pci.h | 3 +++
3 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index cf296f5..6121ef3 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -128,6 +128,24 @@ static void __init pcibios_fw_addr_list_del(void)
pcibios_fw_addr_done = true;
}
+resource_size_t
+pcibios_align_end_resource(void *data, const struct resource *res,
+ resource_size_t size, resource_size_t align)
+{
+ resource_size_t start = res->start;
+
+ /* Take near end */
+ if (res->end + 1 > size) {
+ resource_size_t new_start;
+
+ new_start = round_down(res->end + 1 - size, align);
+ if (new_start > start)
+ start = new_start;
+ }
+
+ return start;
+}
+
/*
* We need to avoid collisions with `mirrored' VGA ports
* and other strange ISA hardware, so we always want the
@@ -154,6 +172,8 @@ pcibios_align_resource(void *data, const struct resource *res,
if (start & 0x300)
start = (start + 0x3ff) & ~0x3ff;
} else if (res->flags & IORESOURCE_MEM) {
+ start = pcibios_align_end_resource(data, res, size, align);
+
/* The low 1MB range is reserved for ISA cards */
if (start < BIOS_END)
start = BIOS_END;
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 65a41e7..c282b86 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -1318,6 +1318,15 @@ static void sort_align_test(struct list_head *head)
}
}
+resource_size_t __weak pcibios_align_end_resource(void *data,
+ const struct resource *res,
+ resource_size_t size,
+ resource_size_t align)
+{
+ /* default is not aligned to end */
+ return res->start;
+}
+
static bool is_align_size_good(struct list_head *head,
resource_size_t min_align, resource_size_t size,
resource_size_t start)
@@ -1335,7 +1344,7 @@ static bool is_align_size_good(struct list_head *head,
list_for_each_entry(p, head, list)
if (allocate_resource(&root, &p->res, p->size,
0, (resource_size_t)-1ULL,
- p->align, NULL, NULL))
+ p->align, pcibios_align_end_resource, NULL))
return false;
return true;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index d7b1ceb..41d06ce 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -800,6 +800,9 @@ char *pcibios_setup(char *str);
resource_size_t pcibios_align_resource(void *, const struct resource *,
resource_size_t,
resource_size_t);
+resource_size_t pcibios_align_end_resource(void *, const struct resource *,
+ resource_size_t,
+ resource_size_t);
void pcibios_update_irq(struct pci_dev *, int irq);
/* Weak but can be overriden by arch */
--
1.8.4.5
next prev parent reply other threads:[~2016-04-08 0:16 UTC|newest]
Thread overview: 86+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-08 0:15 [PATCH v11 00/60] PCI: Resource allocation cleanup for v4.7 Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 01/60] PCI: Fix iomem_is_exclusive() checking in pci_mmap_resource() Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 02/60] alpha/PCI: Only check iomem_is_exclusive() for IORESOURCE_MEM, not IORESOURCE_IO Yinghai Lu
2016-04-25 21:01 ` Bjorn Helgaas
2016-04-08 0:15 ` [PATCH v11 03/60] PCI: Add pci_find_bus_resource() Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 04/60] sparc/PCI: Use correct offset for bus address to resource Yinghai Lu
2016-04-22 20:49 ` Bjorn Helgaas
2016-04-28 4:55 ` Yinghai Lu
2016-04-28 13:56 ` Bjorn Helgaas
2016-04-29 7:19 ` Yinghai Lu
2016-05-03 22:52 ` Yinghai Lu
2016-05-04 0:37 ` Benjamin Herrenschmidt
2016-05-04 1:25 ` Bjorn Helgaas
2016-05-04 5:08 ` Yinghai Lu
2016-05-04 5:52 ` Yinghai Lu
2016-05-04 15:17 ` Bjorn Helgaas
2016-05-04 18:46 ` Yinghai Lu
2016-05-05 0:25 ` Yinghai Lu
2016-05-05 15:53 ` Yinghai Lu
2016-05-05 22:02 ` Benjamin Herrenschmidt
2016-05-06 0:56 ` Yinghai Lu
2016-05-06 4:18 ` Yinghai Lu
2016-05-06 18:26 ` Bjorn Helgaas
2016-05-10 6:18 ` Yinghai Lu
2016-05-04 4:17 ` David Miller
2016-04-08 0:15 ` [PATCH v11 05/60] sparc/PCI: Reserve legacy mmio after PCI mmio Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 06/60] sparc/PCI: Add IORESOURCE_MEM_64 for 64-bit resource in OF parsing Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 07/60] sparc/PCI: Keep resource idx order with bridge register number Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 08/60] PCI: Kill wrong quirk about M7101 Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 09/60] powerpc/PCI: Keep resource idx order with bridge register number Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 10/60] powerpc/PCI: Add IORESOURCE_MEM_64 for 64-bit resource in OF parsing Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 11/60] OF/PCI: Add IORESOURCE_MEM_64 for 64-bit resource Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 12/60] PCI: Check pref compatible bit for mem64 resource of PCIe device Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 13/60] PCI: Only treat non-pref mmio64 as pref if all bridges have MEM_64 Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 14/60] PCI: Add has_mem64 for struct host_bridge Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 15/60] PCI: Only treat non-pref mmio64 as pref if host bridge has mmio64 Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 16/60] PCI: Restore pref MMIO allocation logic for host bridge without mmio64 Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 17/60] PCI: Don't release fixed resource for realloc Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 18/60] PCI: Claim fixed resource during remove/rescan path Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 19/60] PCI: Set resource to FIXED for LSI devices Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 20/60] PCI: Separate realloc list checking after allocation Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 21/60] PCI: Treat optional as required in first try for bridge rescan Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 22/60] PCI: Get new realloc size for bridge for last try Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 23/60] PCI: Don't release sibling bridge resources during hotplug Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 24/60] PCI: Cleanup res_to_dev_res() printout Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 25/60] PCI: Reuse res_to_dev_res() in reassign_resources_sorted() Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 26/60] PCI: Use correct align for optional only resources during sorting Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 27/60] PCI: Optimize bus min_align/size calculation during sizing Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 28/60] PCI: Optimize bus align/size calculation for optional " Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 29/60] PCI: Don't add too much optional size for hotplug bridge MMIO Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 30/60] PCI: Reorder resources list for required/optional resources Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 31/60] PCI: Remove duplicated code for resource sorting Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 32/60] PCI: Rename pdev_sort_resources() to pdev_assign_resources_prepare() Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 33/60] PCI: Treat ROM resource as optional during realloc Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 34/60] PCI: Add debug printout during releasing partial assigned resources Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 35/60] PCI: Simplify res reference using in __assign_resources_sorted() Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 36/60] PCI: Add __add_to_list() Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 37/60] PCI: Cache window alignment value during bus sizing Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 38/60] PCI: Check if resource is allocated before trying to assign one Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 39/60] PCI: Separate out save_resources()/restore_resources() Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 40/60] PCI: Move comment to pci_need_to_release() Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 41/60] PCI: Separate required+optional assigning to another function Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 42/60] PCI: Skip required+optional if there is no optional Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 43/60] PCI: Move saved required resource list out of required+optional assigning Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 44/60] PCI: Add alt_size ressource allocation support Yinghai Lu
2016-04-08 0:56 ` Linus Torvalds
2016-04-08 5:50 ` Yinghai Lu
2016-04-08 6:24 ` Benjamin Herrenschmidt
2016-04-08 0:15 ` [PATCH v11 45/60] PCI: Add support for more than two alt_size entries under same bridge Yinghai Lu
2016-04-08 0:15 ` [PATCH v11 46/60] PCI: Fix size calculation with old_size on rescan path Yinghai Lu
2016-04-08 0:16 ` [PATCH v11 47/60] PCI: Don't add too much optional size for hotplug bridge io Yinghai Lu
2016-04-08 0:16 ` [PATCH v11 48/60] PCI: Move ISA io port align out of calculate_iosize() Yinghai Lu
2016-04-08 0:16 ` [PATCH v11 49/60] PCI: Don't add too much io port for hotplug bridge with old size Yinghai Lu
2016-04-08 0:16 ` [PATCH v11 50/60] PCI: Unify calculate_size() for io port and MMIO Yinghai Lu
2016-04-08 0:16 ` [PATCH v11 51/60] PCI: Allow bridge optional only io port resource required size to be 0 Yinghai Lu
2016-04-08 0:16 ` [PATCH v11 52/60] PCI: Unify skip_ioresource_align() Yinghai Lu
2016-04-08 0:16 ` [PATCH v11 53/60] PCI: Kill macro checking for bus io port sizing Yinghai Lu
2016-04-08 0:16 ` [PATCH v11 54/60] resources: Make allocate_resource() return best fit resource Yinghai Lu
2016-04-08 0:16 ` Yinghai Lu [this message]
2016-04-08 0:16 ` [PATCH v11 56/60] PCI: Add debug print out for min_align and alt_size Yinghai Lu
2016-04-08 0:16 ` [PATCH v11 57/60] PCI, x86: Add pci=assign_pref_bars to reallocate pref BARs Yinghai Lu
2016-04-08 0:16 ` [PATCH v11 58/60] PCI: Introduce resource_disabled() Yinghai Lu
2016-04-08 0:16 ` [PATCH v11 59/60] PCI: Don't set flags to 0 when assign resource fail Yinghai Lu
2016-04-08 0:16 ` [PATCH v11 60/60] PCI: Only try to assign io port only for root bus that support it Yinghai Lu
2016-04-08 0:51 ` [PATCH v11 00/60] PCI: Resource allocation cleanup for v4.7 Linus Torvalds
2016-04-09 5:29 ` Yinghai Lu
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