From: Lucas Stach <l.stach@pengutronix.de>
To: Joao Pinto <Joao.Pinto@synopsys.com>
Cc: bhelgaas@google.com, marc.zyngier@arm.com, jingoohan1@gmail.com,
m-karicheri2@ti.com, thomas.petazzoni@free-electrons.com,
minghuan.Lian@freescale.com, mingkai.hu@freescale.com,
tie-fei.zang@freescale.com, hongxing.zhu@nxp.com,
niklas.cassel@axis.com, jesper.nilsson@axis.com,
wangzhou1@hisilicon.com, gabriele.paoloni@huawei.com,
svarbanov@mm-sol.com, linux-pci@vger.kernel.org
Subject: Re: [RFC 1/8] pci: adding new irq api to pci-designware
Date: Fri, 12 May 2017 19:02:15 +0200 [thread overview]
Message-ID: <1494608535.23969.11.camel@pengutronix.de> (raw)
In-Reply-To: <d9664b857b0b9fe9cba6b8de5f0b6d365fe86f36.1494606911.git.jpinto@synopsys.com>
Am Freitag, den 12.05.2017, 17:56 +0100 schrieb Joao Pinto:
> This patch adds the new interrupt api to pecie-designware, keeping the old
> one. A define was added to toggle between the two apis (for testing purposes).
>
> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
> ---
> drivers/pci/dwc/pcie-designware-host.c | 241 ++++++++++++++++++++++++++++++++-
> drivers/pci/dwc/pcie-designware.h | 5 +
> 2 files changed, 244 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c
> index 28ed32b..6810ea10b 100644
> --- a/drivers/pci/dwc/pcie-designware-host.c
> +++ b/drivers/pci/dwc/pcie-designware-host.c
[...]
> +static int dw_pcie_irq_domain_alloc(struct irq_domain *domain,
> + unsigned int virq, unsigned int nr_irqs,
> + void *args)
> +{
> + struct dw_pcie *pci = domain->host_data;
> + struct pcie_port *pp = &pci->pp;
> + unsigned long bit;
> +
> + mutex_lock(&pp->lock);
> +
> + WARN_ON(nr_irqs != 1);
So the new API doesn't support multi MSI, where we need more than a
single contiguous MSI in a range? If this is the case then this change
is breaking real use-cases that work today.
Regards,
Luvas
next prev parent reply other threads:[~2017-05-12 17:02 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-12 16:56 [RFC 0/8] add new irq api to pcie-designware Joao Pinto
2017-05-12 16:56 ` [RFC 1/8] pci: adding new irq api to pci-designware Joao Pinto
2017-05-12 17:02 ` Lucas Stach [this message]
2017-05-12 17:36 ` Marc Zyngier
2017-05-15 10:32 ` Joao Pinto
2017-05-12 16:56 ` [RFC 2/8] pci: exynos SoC driver adapted to new irq API Joao Pinto
2017-05-12 16:56 ` [RFC 3/8] pci: imx6 " Joao Pinto
2017-05-12 16:56 ` [RFC 4/8] pci: artpec6 " Joao Pinto
2017-05-12 16:56 ` [RFC 5/8] pci: generic PCIe DW " Joao Pinto
2017-05-12 16:56 ` [RFC 6/8] pci: qcom SoC " Joao Pinto
2017-05-12 16:56 ` [RFC 7/8] pci: keystone " Joao Pinto
2017-05-12 16:56 ` [RFC 8/8] pci: removing old irq api from pcie-designware Joao Pinto
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