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From: Zhiqiang Hou <Zhiqiang.Hou@nxp.com>
To: <linux-pci@vger.kernel.org>, <bhelgaas@google.com>,
	<jingoohan1@gmail.com>, <Joao.Pinto@synopsys.com>
Cc: <minghuan.lian@nxp.com>, <mingkai.hu@nxp.com>, <roy.zang@nxp.com>,
	Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Subject: [PATCHv2 0/6] PCI: fix the designware Class code fixup doesn't work issue and refactor ls-pcie host init
Date: Thu, 3 Aug 2017 16:23:34 +0800	[thread overview]
Message-ID: <1501748620-42866-1-git-send-email-Zhiqiang.Hou@nxp.com> (raw)

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

The first two patches are aim to fix the designware Class code fixup
doesn't work issue, because the Class Code register of DBI is read-only,
so must enable the write permission before updating this register.

The rest 4 patches are used to refactor the ls-pcie host init function.
Make ls1021a pcie reuse the ls-pcie common host init function.
Disable the bootloader configured outbound windows to avoid conflict
to outbound windows configured by dw_pcie_setup_rc().
And remove the duplicate Class Code fixup from ls-pcie driver.

Hou Zhiqiang (6):
  PCI: designware: add accessors for write permission of DBI read-only
    registers
  PCI: designware: enable write permission before updating class code
  PCI: layerscape: use accessors to enable/disable DBI RO registers'
    write permission
  PCI: layerscape: refactor the host_init function
  PCI: layerscape: Disable the outbound windows configured by bootloader
  PCI: layerscape: remove the duplicate Class field fix code

 drivers/pci/dwc/pci-layerscape.c       | 86 +++++++++++++++++++---------------
 drivers/pci/dwc/pcie-designware-host.c |  4 ++
 drivers/pci/dwc/pcie-designware.h      | 25 ++++++++++
 3 files changed, 76 insertions(+), 39 deletions(-)

-- 
2.1.0.27.g96db324

             reply	other threads:[~2017-08-03  8:40 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-03  8:23 Zhiqiang Hou [this message]
2017-08-03  8:23 ` [PATCHv2 1/6] PCI: designware: add accessors for write permission of DBI read-only registers Zhiqiang Hou
2017-08-08 12:45   ` Joao Pinto
2017-08-09  2:50     ` Z.q. Hou
2017-08-03  8:23 ` [PATCHv2 2/6] PCI: designware: enable write permission before updating class code Zhiqiang Hou
2017-08-08 12:45   ` Joao Pinto
2017-08-09  2:51     ` Z.q. Hou
2017-08-03  8:23 ` [PATCHv2 3/6] PCI: layerscape: use accessors to enable/disable DBI RO registers' write permission Zhiqiang Hou
2017-08-08 12:46   ` Joao Pinto
2017-08-09  2:52     ` Z.q. Hou
2017-08-03  8:23 ` [PATCHv2 4/6] PCI: layerscape: refactor the host_init function Zhiqiang Hou
2017-08-08 13:13   ` Joao Pinto
2017-08-09  2:53     ` Z.q. Hou
2017-08-14 21:38   ` Bjorn Helgaas
2017-08-14 22:26     ` Bjorn Helgaas
2017-08-15  3:21       ` Z.q. Hou
2017-08-15  9:34       ` Stanimir Varbanov
2017-08-16  5:19         ` Z.q. Hou
2017-08-15  3:05     ` Z.q. Hou
2017-08-03  8:23 ` [PATCHv2 5/6] PCI: layerscape: Disable the outbound windows configured by bootloader Zhiqiang Hou
2017-08-03  8:23 ` [PATCHv2 6/6] PCI: layerscape: remove the duplicate Class field fix code Zhiqiang Hou

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