From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from cernmx13.cern.ch ([188.184.36.46]:14884 "EHLO CERNMX13.cern.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757335AbaHGO7L (ORCPT ); Thu, 7 Aug 2014 10:59:11 -0400 From: Federico Vaga To: Bjorn Helgaas CC: "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Subject: Re: PCIe bus enumeration Date: Thu, 7 Aug 2014 16:59:09 +0200 Message-ID: <1501870.HCbKP9fkqH@pcbe13110.cern.ch> In-Reply-To: References: <280883016.9onmf0miLq@pcbe13110.cern.ch> <3107266.EcOOcRPPM0@harkonnen> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Sender: linux-pci-owner@vger.kernel.org List-ID: On Tuesday 08 July 2014 14:27:00 Bjorn Helgaas wrote: > On Tue, Jul 8, 2014 at 1:20 PM, Federico Vaga wrote: > > On Tuesday 08 July 2014 12:23:39 Bjorn Helgaas wrote: > >> On Tue, Jul 8, 2014 at 1:15 AM, Federico Vaga > > > > wrote: > >> >> > So, It looks like that some BIOS disable the bridge when > >> >> > there > >> >> > is > >> >> > nothing behind it. Why? Power save? :/ > >> >> > >> >> Could be power savings, or possibly to conserve bus numbers, > >> >> which > >> >> are a limited resource. > >> > > >> > what is the maximum number of buses? > >> > >> 256. > > > > Well, it is not a small number. I will ask directly to the company > > who sell this crate and ask them what is going on in the BIOS > > Yeah, it's not usually a problem until you get to the really big > machines. The BIOS vendor could give you a much better reason; I'm > only speculating. Just to complete the discussion (I forgot to do it). The vendor point me to the correct BIOS configuration to keep all the PCIe port enable even if there is nothing in the slot. Now the bus number enumeration seems "constant" Thank you -- Federico Vaga