From: Zhiqiang Hou <Zhiqiang.Hou@nxp.com>
To: <linux-pci@vger.kernel.org>, <bhelgaas@google.com>,
<jingoohan1@gmail.com>, <Joao.Pinto@synopsys.com>
Cc: <minghuan.lian@nxp.com>, <mingkai.hu@nxp.com>, <roy.zang@nxp.com>,
<svarbanov@mm-sol.com>, <niklas.cassel@axis.com>,
<jesper.nilsson@axis.com>, Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Subject: [PATCHv3 2/9] PCI: layerscape: move STRFMR1 access out from the DBI write-enable bracket
Date: Wed, 16 Aug 2017 12:56:52 +0800 [thread overview]
Message-ID: <1502859419-33696-3-git-send-email-Zhiqiang.Hou@nxp.com> (raw)
In-Reply-To: <1502859419-33696-1-git-send-email-Zhiqiang.Hou@nxp.com>
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
The STRFMR1 is not a DBI read-only register, so move it out from the
write-enable bracket.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V3:
- New patch separated from 3/6 patch set v2.
drivers/pci/dwc/pci-layerscape.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/dwc/pci-layerscape.c b/drivers/pci/dwc/pci-layerscape.c
index aebefb4..c169400 100644
--- a/drivers/pci/dwc/pci-layerscape.c
+++ b/drivers/pci/dwc/pci-layerscape.c
@@ -162,9 +162,10 @@ static int ls_pcie_host_init(struct pcie_port *pp)
iowrite32(1, pci->dbi_base + PCIE_DBI_RO_WR_EN);
ls_pcie_fix_class(pcie);
ls_pcie_clear_multifunction(pcie);
- ls_pcie_drop_msg_tlp(pcie);
iowrite32(0, pci->dbi_base + PCIE_DBI_RO_WR_EN);
+ ls_pcie_drop_msg_tlp(pcie);
+
dw_pcie_setup_rc(pp);
return 0;
--
2.1.0.27.g96db324
next prev parent reply other threads:[~2017-08-16 5:14 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-16 4:56 [PATCHv3 0/9] PCI: dwc: refactor ls-pcie ->host_init() and fix bug for dw_pcie_setup_rc Zhiqiang Hou
2017-08-16 4:56 ` [PATCHv3 1/9] PCI: layerscape: Add dw_pcie_setup_rc to ls-pcie common host init Zhiqiang Hou
2017-08-16 4:56 ` Zhiqiang Hou [this message]
2017-08-16 4:56 ` [PATCHv3 3/9] PCI: layerscape: add class code and multifunction fixups for ls1021a Zhiqiang Hou
2017-08-16 4:56 ` [PATCHv3 4/9] PCI: layerscape: refactor the host_init function Zhiqiang Hou
2017-08-16 4:56 ` [PATCHv3 5/9] PCI: layerscape: Disable the outbound windows configured by bootloader Zhiqiang Hou
2017-08-16 4:56 ` [PATCHv3 6/9] PCI: designware: add accessors for write permission of DBI read-only registers Zhiqiang Hou
2017-08-16 11:33 ` Stanimir Varbanov
2017-08-17 3:03 ` Z.q. Hou
2017-08-17 11:25 ` Stanimir Varbanov
2017-08-18 5:28 ` Z.q. Hou
2017-08-18 11:51 ` Joao Pinto
2017-08-21 3:21 ` Z.q. Hou
2017-08-16 4:56 ` [PATCHv3 7/9] PCI: layerscape: use accessors to enable/disable DBI RO registers' write permission Zhiqiang Hou
2017-08-16 4:56 ` [PATCHv3 8/9] PCI: designware: enable write permission before updating DBI RO registers Zhiqiang Hou
2017-08-16 4:56 ` [PATCHv3 9/9] PCI: dwc: remove the obsolete fixups Zhiqiang Hou
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1502859419-33696-3-git-send-email-Zhiqiang.Hou@nxp.com \
--to=zhiqiang.hou@nxp.com \
--cc=Joao.Pinto@synopsys.com \
--cc=bhelgaas@google.com \
--cc=jesper.nilsson@axis.com \
--cc=jingoohan1@gmail.com \
--cc=linux-pci@vger.kernel.org \
--cc=minghuan.lian@nxp.com \
--cc=mingkai.hu@nxp.com \
--cc=niklas.cassel@axis.com \
--cc=roy.zang@nxp.com \
--cc=svarbanov@mm-sol.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).