From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: Message-ID: <1507626095.26339.5.camel@linux.intel.com> Subject: Re: [PATCH] mmc: sdhci-pci: Remove D3 delays for Intel BYT-related host controllers From: Alan Cox To: Bjorn Helgaas , "Hunter, Adrian" Cc: Ulf Hansson , linux-mmc , linux-pci , Bjorn Helgaas , linux-acpi , "Rafael J. Wysocki" Date: Tue, 10 Oct 2017 10:01:35 +0100 In-Reply-To: <20171009202502.GN25517@bhelgaas-glaptop.roam.corp.google.com> References: <1507294259-20438-1-git-send-email-adrian.hunter@intel.com> <20171006162048.GC25517@bhelgaas-glaptop.roam.corp.google.com> <20171009134154.GJ25517@bhelgaas-glaptop.roam.corp.google.com> <363DA0ED52042842948283D2FC38E4649BF3590E@IRSMSX106.ger.corp.intel.com> <20171009202502.GN25517@bhelgaas-glaptop.roam.corp.google.com> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 List-ID: > Your concern was that a quirk would require a long list of device IDs > and we'd have to add new ones.  I share that concern, I'm not sure I do. The bus topology tells you what is on die, and the id of the root bridge tells you if it's one of the parts you can do this. Alan