From: Vidya Sagar <vidyas@nvidia.com>
To: <treding@nvidia.com>, <bhelgaas@google.com>
Cc: <linux-tegra@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<kthota@nvidia.com>, Vidya Sagar <vidyas@nvidia.com>
Subject: [PATCH 0/6] Tegra PCIe end point config space map code refactoring
Date: Fri, 13 Oct 2017 00:20:05 +0530 [thread overview]
Message-ID: <1507834211-24922-1-git-send-email-vidyas@nvidia.com> (raw)
PCIe host controller in Tegra SoCs has 1GB of aperture available
for mapping end points config space, IO and BARs. In that, currently
256MB is being reserved for mapping end points configuration space
which leaves less memory space available for mapping end points BARs
on some of the platforms.
This patch series attempts to use only 4K space from 1GB aperture to
access end points configuration space.
Currently, this change benefits T20 and future chips in saving (i.e. repurposed
to use for BAR mapping) physical space as well as kernel virtual mapping space,
it saves only kernel virtual address space in T30, T124, T132 and T210.
Testing Done on T210:
Enumeration is and basic functionality of immediate devices
Enumeration of devices behind a PCIe switch
Complete 4K configuration space access
Vidya Sagar (6):
PCI: tegra: refactor config space mapping code
ARM: tegra: limit PCIe config space mapping to 4K for T20
ARM: tegra: limit PCIe config space mapping to 4K for T30
ARM: tegra: limit PCIe config space mapping to 4K for T124
ARM64: tegra: limit PCIe config space mapping to 4K for T132
ARM64: tegra: limit PCIe config space mapping to 4K for T210
arch/arm/boot/dts/tegra124.dtsi | 2 +-
arch/arm/boot/dts/tegra20.dtsi | 8 +--
arch/arm/boot/dts/tegra30.dtsi | 2 +-
arch/arm64/boot/dts/nvidia/tegra132.dtsi | 2 +-
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 2 +-
drivers/pci/host/pci-tegra.c | 85 +++++++++-----------------------
6 files changed, 31 insertions(+), 70 deletions(-)
--
2.7.4
next reply other threads:[~2017-10-12 18:51 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-12 18:50 Vidya Sagar [this message]
2017-10-12 18:50 ` [PATCH 1/6] PCI: tegra: refactor config space mapping code Vidya Sagar
2017-10-20 19:08 ` Bjorn Helgaas
2017-10-23 5:39 ` Vidya Sagar
2017-10-23 13:33 ` Bjorn Helgaas
2017-10-12 18:50 ` [PATCH 2/6] ARM: tegra: limit PCIe config space mapping to 4K for T20 Vidya Sagar
2017-10-12 18:50 ` [PATCH 3/6] ARM: tegra: limit PCIe config space mapping to 4K for T30 Vidya Sagar
2017-10-12 18:50 ` [PATCH 4/6] ARM: tegra: limit PCIe config space mapping to 4K for T124 Vidya Sagar
2017-10-12 18:50 ` [PATCH 5/6] ARM64: tegra: limit PCIe config space mapping to 4K for T132 Vidya Sagar
2017-10-12 18:50 ` [PATCH 6/6] ARM64: tegra: limit PCIe config space mapping to 4K for T210 Vidya Sagar
2017-10-15 6:21 ` [PATCH 0/6] Tegra PCIe end point config space map code refactoring Manikanta Maddireddy
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