From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from hqemgate15.nvidia.com ([216.228.121.64]:2240 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932284AbdJWOhk (ORCPT ); Mon, 23 Oct 2017 10:37:40 -0400 From: Vidya Sagar To: , CC: , , , , , , Subject: [PATCH V2 4/7] ARM: tegra: limit PCIe config space mapping to 4K for T124 Date: Mon, 23 Oct 2017 20:05:09 +0530 Message-ID: <1508769312-12465-5-git-send-email-vidyas@nvidia.com> In-Reply-To: <1508769312-12465-1-git-send-email-vidyas@nvidia.com> References: <1508769312-12465-1-git-send-email-vidyas@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-pci-owner@vger.kernel.org List-ID: reduces PCIe config space mapping size from its current 256MB to 4K to have only 4K of virtual memory mapping and to be in line with driver implementation Signed-off-by: Vidya Sagar --- V2: * no changes in this patch arch/arm/boot/dts/tegra124.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 8baf00b89efb..e3cd9dca57cb 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -19,7 +19,7 @@ device_type = "pci"; reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ 0x0 0x01003800 0x0 0x00000800 /* AFI registers */ - 0x0 0x02000000 0x0 0x10000000>; /* configuration space */ + 0x0 0x11FFF000 0x0 0x00001000>; /* configuration space */ reg-names = "pads", "afi", "cs"; interrupts = , /* controller interrupt */ ; /* MSI interrupt */ -- 2.7.4