From: Manikanta Maddireddy <mmaddireddy@nvidia.com>
To: <thierry.reding@gmail.com>, <bhelgaas@google.com>,
<jonathanh@nvidia.com>
Cc: <linux-tegra@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<vidyas@nvidia.com>, <kthota@nvidia.com>,
Manikanta Maddireddy <mmaddireddy@nvidia.com>
Subject: [PATCH 01/12] PCI: tegra: Start LTSSM after programming root port
Date: Sat, 28 Oct 2017 00:59:18 +0530 [thread overview]
Message-ID: <1509132569-9398-2-git-send-email-mmaddireddy@nvidia.com> (raw)
In-Reply-To: <1509132569-9398-1-git-send-email-mmaddireddy@nvidia.com>
This patch ensures that LTSSM is started (by deasserting pcie_xrst) only
after all the required root port register programming is completed.
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
---
drivers/pci/host/pci-tegra.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 96e8038c3019..b41c60c7414c 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -1024,9 +1024,6 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie)
}
}
- /* take the PCIe interface module out of reset */
- reset_control_deassert(pcie->pcie_xrst);
-
/* finally enable PCIe */
value = afi_readl(pcie, AFI_CONFIGURATION);
value |= AFI_CONFIGURATION_EN_FPCI;
@@ -1065,7 +1062,6 @@ static void tegra_pcie_power_off(struct tegra_pcie *pcie)
dev_err(dev, "failed to power off PHY(s): %d\n", err);
}
- reset_control_assert(pcie->pcie_xrst);
reset_control_assert(pcie->afi_rst);
reset_control_assert(pcie->pex_rst);
@@ -2116,7 +2112,12 @@ static void tegra_pcie_enable_ports(struct tegra_pcie *pcie)
port->index, port->lanes);
tegra_pcie_port_enable(port);
+ }
+ /* take the PCIe interface module out of reset */
+ reset_control_deassert(pcie->pcie_xrst);
+
+ list_for_each_entry_safe(port, tmp, &pcie->ports, list) {
if (tegra_pcie_port_check_link(port))
continue;
--
2.1.4
next prev parent reply other threads:[~2017-10-27 19:30 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-27 19:29 [PATCH 00/12] Enable Tegra root port features and apply SW fixups Manikanta Maddireddy
2017-10-27 19:29 ` Manikanta Maddireddy [this message]
2017-10-27 19:29 ` [PATCH 02/12] PCI: tegra: Move REFCLK pad settings out of phy_power_on() Manikanta Maddireddy
2017-10-27 19:29 ` [PATCH 03/12] PCI: tegra: Retrain link for Gen2 speed Manikanta Maddireddy
2017-10-29 9:34 ` Vidya Sagar
2017-10-29 9:38 ` Vidya Sagar
2017-10-30 3:51 ` Manikanta Maddireddy
2017-10-27 19:29 ` [PATCH 04/12] PCI: tegra: Advertise AER capability Manikanta Maddireddy
2017-10-29 9:39 ` Vidya Sagar
2017-10-30 3:54 ` Manikanta Maddireddy
2017-10-27 19:29 ` [PATCH 05/12] PCI: tegra: Program UPHY electrical settings in Tegra210 Manikanta Maddireddy
2017-10-27 19:29 ` [PATCH 06/12] PCI: tegra: Enable opportunistic update FC and ACK Manikanta Maddireddy
2017-10-29 9:41 ` Vidya Sagar
2017-10-30 3:55 ` Manikanta Maddireddy
2017-10-27 19:29 ` [PATCH 07/12] PCI: tegra: Disable AFI dynamic clock gating Manikanta Maddireddy
2017-10-29 9:42 ` Vidya Sagar
2017-10-30 3:55 ` Manikanta Maddireddy
2017-10-30 15:58 ` David Laight
2017-10-30 16:18 ` Manikanta Maddireddy
2017-10-27 19:29 ` [PATCH 08/12] PCI: tegra: Wait for DLLP to finish before entering L1 or L2 Manikanta Maddireddy
2017-10-29 9:42 ` Vidya Sagar
2017-10-30 3:56 ` Manikanta Maddireddy
2017-10-27 19:29 ` [PATCH 09/12] PCI: tegra: Enable PCIe xclk clock clamping Manikanta Maddireddy
2017-10-29 9:43 ` Vidya Sagar
2017-10-30 3:56 ` Manikanta Maddireddy
2017-10-27 19:29 ` [PATCH 10/12] PCI: tegra: Add SW fixup for RAW violations Manikanta Maddireddy
2017-10-27 19:29 ` [PATCH 11/12] PCI: tegra: Increase the deskew retry time Manikanta Maddireddy
2017-10-27 19:29 ` [PATCH 12/12] PCI: tegra: Update flow control threshold in Tegra210 Manikanta Maddireddy
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