From: Vidya Sagar <vidyas@nvidia.com>
To: <treding@nvidia.com>, <bhelgaas@google.com>
Cc: <linux-tegra@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<kthota@nvidia.com>, <mmaddireddy@nvidia.com>,
<vidyas@nvidia.com>, <robh+dt@kernel.org>,
<devicetree@vger.kernel.org>
Subject: [PATCH V3 2/2] ARM64: tegra: limit PCIe config space mapping to 4K for T186
Date: Mon, 4 Dec 2017 23:23:50 +0530 [thread overview]
Message-ID: <1512410030-21038-3-git-send-email-vidyas@nvidia.com> (raw)
In-Reply-To: <1512410030-21038-1-git-send-email-vidyas@nvidia.com>
reduces PCIe config space mapping size from its current 256MB
to 4K to have only 4K of virtual memory mapping and to be
in line with driver implementation
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
V3:
* no change in this patch
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 46d1f287fb0f..62fa3bef3e18 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -363,7 +363,7 @@
device_type = "pci";
reg = <0x0 0x10003000 0x0 0x00000800 /* PADS registers */
0x0 0x10003800 0x0 0x00000800 /* AFI registers */
- 0x0 0x40000000 0x0 0x10000000>; /* configuration space */
+ 0x0 0x40000000 0x0 0x00001000>; /* configuration space */
reg-names = "pads", "afi", "cs";
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
@@ -381,9 +381,9 @@
ranges = <0x82000000 0 0x10000000 0x0 0x10000000 0 0x00001000 /* port 0 configuration space */
0x82000000 0 0x10001000 0x0 0x10001000 0 0x00001000 /* port 1 configuration space */
0x82000000 0 0x10004000 0x0 0x10004000 0 0x00001000 /* port 2 configuration space */
- 0x81000000 0 0x0 0x0 0x50000000 0 0x00010000 /* downstream I/O (64 KiB) */
- 0x82000000 0 0x50100000 0x0 0x50100000 0 0x07F00000 /* non-prefetchable memory (127 MiB) */
- 0xc2000000 0 0x58000000 0x0 0x58000000 0 0x28000000>; /* prefetchable memory (640 MiB) */
+ 0x81000000 0 0x0 0x0 0x40001000 0 0x00010000 /* downstream I/O (64 KiB) */
+ 0x82000000 0 0x40100000 0x0 0x40100000 0 0x07F00000 /* non-prefetchable memory (127 MiB) */
+ 0xc2000000 0 0x48000000 0x0 0x48000000 0 0x38000000>; /* prefetchable memory (896 MiB) */
clocks = <&bpmp TEGRA186_CLK_AFI>,
<&bpmp TEGRA186_CLK_PCIE>,
--
2.7.4
next prev parent reply other threads:[~2017-12-04 17:54 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-04 17:53 [PATCH V3 0/2] Tegra PCIe end point config space map code refactoring Vidya Sagar
2017-12-04 17:53 ` [PATCH V3 1/2] PCI: tegra: refactor config space mapping code Vidya Sagar
2017-12-04 17:53 ` Vidya Sagar [this message]
2017-12-11 10:54 ` [PATCH V3 0/2] Tegra PCIe end point config space map code refactoring Thierry Reding
2017-12-11 17:54 ` Bjorn Helgaas
2017-12-12 11:01 ` Lorenzo Pieralisi
2017-12-12 12:22 ` Thierry Reding
2017-12-14 10:37 ` Lorenzo Pieralisi
2017-12-14 14:01 ` Thierry Reding
-- strict thread matches above, loose matches on Subject: below --
2017-10-24 6:44 Vidya Sagar
2017-10-24 6:44 ` [PATCH V3 2/2] ARM64: tegra: limit PCIe config space mapping to 4K for T186 Vidya Sagar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1512410030-21038-3-git-send-email-vidyas@nvidia.com \
--to=vidyas@nvidia.com \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=kthota@nvidia.com \
--cc=linux-pci@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=mmaddireddy@nvidia.com \
--cc=robh+dt@kernel.org \
--cc=treding@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).