From: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
To: <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: <bhelgaas@google.com>, <rgummal@xilinx.com>,
Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Subject: [PATCH 2/3] PCI: Use dedicated Xilinx controller irq number for AER
Date: Wed, 1 Aug 2018 22:14:48 +0530 [thread overview]
Message-ID: <1533141889-19962-3-git-send-email-bharat.kumar.gogada@xilinx.com> (raw)
In-Reply-To: <1533141889-19962-1-git-send-email-bharat.kumar.gogada@xilinx.com>
Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced
Error Interrupt Message Number. The controller has dedicated interrupt line
for reporting PCIe errors along with AER.
Using pci_dev->sysdata of root port to save controller irq number, which
will be used for registering AER irq handler.
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
---
drivers/pci/quirks.c | 29 +++++++++++++++++++++++++++++
1 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index f439de8..e666373 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4753,3 +4753,32 @@ static void quirk_gpu_hda(struct pci_dev *hda)
PCI_CLASS_MULTIMEDIA_HD_AUDIO, 8, quirk_gpu_hda);
DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
PCI_CLASS_MULTIMEDIA_HD_AUDIO, 8, quirk_gpu_hda);
+
+#if defined(CONFIG_ARCH_ZYNQMP) && defined(CONFIG_PCIE_XILINX_NWL) && \
+ defined(CONFIG_PCIEAER)
+/*
+ * Xilinx ZynqMP PS PCIe does not report AER interrupts using Advanced
+ * Error Interrupt Message Number. The controller has dedicated interrupt line
+ * for reporting PCIe errors along with AER.
+ */
+#include <linux/of.h>
+#include <linux/of_irq.h>
+
+static void quirk_xilinx_aer_irq(struct pci_dev *dev)
+{
+ struct device_node *dev_node;
+
+ if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT &&
+ pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
+ dev_node = of_find_compatible_node(NULL, NULL,
+ "xlnx,nwl-pcie-2.11");
+ if (!dev_node) {
+ dev_err(&dev->dev, "Error could not find ZynqMP PS PCIe node\n");
+ return;
+ }
+
+ dev->sysdata = dev_node->data;
+ }
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_XILINX, PCI_ANY_ID, quirk_xilinx_aer_irq);
+#endif
--
1.7.1
next prev parent reply other threads:[~2018-08-01 19:00 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-01 16:44 [PATCH 0/3] Use xilinx controller irq for AER handler Bharat Kumar Gogada
2018-08-01 16:44 ` [PATCH 1/3] PCI: xilinx-nwl: Save error IRQ number in device_node private data Bharat Kumar Gogada
2018-08-02 7:50 ` Christoph Hellwig
2018-08-01 16:44 ` Bharat Kumar Gogada [this message]
2018-08-06 21:03 ` [PATCH 2/3] PCI: Use dedicated Xilinx controller irq number for AER Bjorn Helgaas
2018-08-01 16:44 ` [PATCH 3/3] PCI/portdrv: Add support for sharing xilinx controller irq with AER Bharat Kumar Gogada
2018-08-01 18:05 ` Sinan Kaya
2018-08-06 20:56 ` Bjorn Helgaas
2018-08-06 21:24 ` Sinan Kaya
2018-08-07 13:19 ` Bharat Kumar Gogada
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