From: Alan Douglas <adouglas@cadence.com>
To: <lorenzo.pieralisi@arm.com>
Cc: <kishon@ti.com>, <bhelgaas@google.com>,
<linux-pci@vger.kernel.org>, <gustavo.pimentel@synopsys.com>,
<cyrille.pitchen@bootlin.com>,
Alan Douglas <adouglas@cadence.com>
Subject: [PATCH v4 0/4] Fixes for cadence EP driver
Date: Thu, 11 Oct 2018 17:15:03 +0100 [thread overview]
Message-ID: <1539274503-30876-1-git-send-email-adouglas@cadence.com> (raw)
These patches were previously in the patch series:
"Add MSI-X support for cadence EP driver"
They add fixes for MSI issues discovered during testing of MSI-X
- Use AXI region 0 for interrupt signalling
- Write MSI with 32bit value rather than 16bit
- Check for masking before sending MSI
- Check link is up before sending IRQ
Changes since v3:
- Rebase on Lorenzo's pci/cadence branch
Changes since v2:
- None
Changes since v1:
- Rebased on 4.18-rc1
- Update commit log to mark first 4 patches as fixes
- Correct formatting issues pointed out by checkpatch --strict
Alan Douglas (4):
PCI: cadence: Use AXI region 0 to signal interrupts from EP
PCI: cadence: Write MSI data with 32bits
PCI: cadence: Check whether MSI is masked before sending it
PCI: cadence: Check link is up before sending IRQ from EP
drivers/pci/controller/pcie-cadence-ep.c | 24 ++++++++++++++++++------
1 file changed, 18 insertions(+), 6 deletions(-)
--
1.9.0
next reply other threads:[~2018-10-11 16:15 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-11 16:15 Alan Douglas [this message]
2018-10-12 11:15 ` [PATCH v4 0/4] Fixes for cadence EP driver Lorenzo Pieralisi
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