Linux PCI subsystem development
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From: Dongdong Liu <liudongdong3@huawei.com>
To: <helgaas@kernel.org>, <hch@infradead.org>, <linux-pci@vger.kernel.org>
Subject: [PATCH V2 3/5] PCI: Enable 10-Bit tag support for PCIe Endpoint devices
Date: Tue, 11 May 2021 23:09:02 +0800	[thread overview]
Message-ID: <1620745744-91316-4-git-send-email-liudongdong3@huawei.com> (raw)
In-Reply-To: <1620745744-91316-1-git-send-email-liudongdong3@huawei.com>

10-Bit Tag capability, introduced in PCIe-4.0 increases the total Tag
field size from 8 bits to 10 bits.

For platforms where the RC supports 10-Bit Tag Completer capability,
it is highly recommended for platform firmware or operating software
that configures PCIe hierarchies to Set the 10-Bit Tag Requester Enable
bit automatically in Endpoints with 10-Bit Tag Requester capability. This
enables the important class of 10-Bit Tag capable adapters that send
Memory Read Requests only to host memory.

Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
---
 drivers/pci/probe.c | 36 ++++++++++++++++++++++++++++++++++++
 include/linux/pci.h |  2 ++
 2 files changed, 38 insertions(+)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index e66bc14..b48b41f 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -2051,6 +2051,41 @@ int pci_configure_extended_tags(struct pci_dev *dev, void *ign)
 	return 0;
 }
 
+static void pci_configure_10bit_tags(struct pci_dev *dev)
+{
+	struct pci_dev *bridge;
+
+	if (!pci_is_pcie(dev))
+		return;
+
+	if (!(dev->devcap2 & PCI_EXP_DEVCAP2_10BIT_TAG_COMP))
+		return;
+
+	if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
+		dev->ext_10bit_tag = 1;
+		return;
+	}
+
+	bridge = pci_upstream_bridge(dev);
+	if (bridge && bridge->ext_10bit_tag)
+		dev->ext_10bit_tag = 1;
+
+	/*
+	 * 10-Bit Tag Requester Enable in Device Control 2 Register is RsvdP
+	 * for VF.
+	 */
+	if (dev->is_virtfn)
+		return;
+
+	if (pci_pcie_type(dev) == PCI_EXP_TYPE_ENDPOINT &&
+	    dev->ext_10bit_tag == 1 &&
+	    (dev->devcap2 & PCI_EXP_DEVCAP2_10BIT_TAG_REQ)) {
+		pci_dbg(dev, "enabling 10-Bit Tag Requester\n");
+		pcie_capability_set_word(dev, PCI_EXP_DEVCTL2,
+					PCI_EXP_DEVCTL2_10BIT_TAG_REQ_EN);
+	}
+}
+
 /**
  * pcie_relaxed_ordering_enabled - Probe for PCIe relaxed ordering enable
  * @dev: PCI device to query
@@ -2187,6 +2222,7 @@ static void pci_configure_device(struct pci_dev *dev)
 {
 	pci_configure_mps(dev);
 	pci_configure_extended_tags(dev, NULL);
+	pci_configure_10bit_tags(dev);
 	pci_configure_relaxed_ordering(dev);
 	pci_configure_ltr(dev);
 	pci_configure_eetlp_prefix(dev);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 3244b0b..7c74d64 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -391,6 +391,8 @@ struct pci_dev {
 #endif
 	unsigned int	eetlp_prefix_path:1;	/* End-to-End TLP Prefix */
 
+	unsigned int	ext_10bit_tag:1; /* 10-Bit Tag Completer Supported
+					    from root to here */
 	pci_channel_state_t error_state;	/* Current connectivity state */
 	struct device	dev;			/* Generic device interface */
 
-- 
2.7.4


  parent reply	other threads:[~2021-05-11 15:09 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-11 15:08 [PATCH V2 0/5] PCI: Enable 10-Bit tag support for PCIe devices Dongdong Liu
2021-05-11 15:09 ` [PATCH V2 1/5] PCI: Use cached Device Capabilities 2 Register Dongdong Liu
2021-05-11 15:26   ` Christoph Hellwig
2021-05-12  7:29     ` Dongdong Liu
2021-05-11 15:09 ` [PATCH V2 2/5] PCI: Add 10-Bit Tag register definitions Dongdong Liu
2021-05-11 15:09 ` Dongdong Liu [this message]
2021-05-11 15:09 ` [PATCH V2 4/5] PCI/IOV: Enable 10-Bit tag support for PCIe VF devices Dongdong Liu
  -- strict thread matches above, loose matches on Subject: below --
2021-05-11 13:59 [PATCH V2 0/5] PCI: Enable 10-Bit tag support for PCIe devices Dongdong Liu
2021-05-11 13:59 ` [PATCH V2 3/5] PCI: Enable 10-Bit tag support for PCIe Endpoint devices Dongdong Liu

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