Re: [PATCH v1 2/5] dt-bindings: gpio: mpfs: add coreGPIO support

Rob Herring
2024-03-27T17:57:18Z

On Wed, 27 Mar 2024 12:24:37 +0000, Conor Dooley wrote:
> From: Jamie Gibbons <jamie.gibbons@microchip.com>
>
> The GPIO controllers on PolarFire SoC were based on the "soft" IP
> CoreGPIO, but the inp/outp registers are at different offsets. Add
> compatible to allow for support of both sets of offsets. The soft
> core will not always have interrupts wired up, so only enforce them for
> the "hard" core on PolarFire SoC.
>
> Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../bindings/gpio/microchip,mpfs-gpio.yaml | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>

Reviewed-by: Rob Herring <robh@kernel.org>