From: Richard Zhu <hongxing.zhu@nxp.com>
To: l.stach@pengutronix.de, kwilczynski@kernel.org,
bhelgaas@google.com, lpieralisi@kernel.org, frank.li@nxp.com,
robh+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org,
krzysztof.kozlowski+dt@linaro.org, festevam@gmail.com,
s.hauer@pengutronix.de
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
kernel@pengutronix.de, imx@lists.linux.dev,
Richard Zhu <hongxing.zhu@nxp.com>
Subject: [PATCH v1 6/9] PCI: imx6: Make *_enable_ref_clk() function symmetric
Date: Tue, 24 Sep 2024 11:27:41 +0800 [thread overview]
Message-ID: <1727148464-14341-7-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1727148464-14341-1-git-send-email-hongxing.zhu@nxp.com>
Ensure the *_enable_ref_clk() function is symmetric by addressing missing
disable parts on some platforms. Also, remove the duplicate
imx7d_pcie_init_phy() function as it is the same as
imx7d_pcie_enable_ref_clk().
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 33 +++++++++++----------------
1 file changed, 13 insertions(+), 20 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index f306f2e9dcce..5ec43d9f9784 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -388,13 +388,6 @@ static int imx8mq_pcie_init_phy(struct imx_pcie *imx_pcie)
return 0;
}
-static int imx7d_pcie_init_phy(struct imx_pcie *imx_pcie)
-{
- regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, 0);
-
- return 0;
-}
-
static int imx_pcie_init_phy(struct imx_pcie *imx_pcie)
{
regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
@@ -593,13 +586,13 @@ static int imx_pcie_attach_pd(struct device *dev)
static int imx6sx_pcie_enable_ref_clk(struct imx_pcie *imx_pcie, bool enable)
{
- if (enable)
- regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
- IMX6SX_GPR12_PCIE_TEST_POWERDOWN);
-
+ regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
+ IMX6SX_GPR12_PCIE_TEST_POWERDOWN,
+ enable ? 0 : IMX6SX_GPR12_PCIE_TEST_POWERDOWN);
return 0;
}
+
static int imx6q_pcie_enable_ref_clk(struct imx_pcie *imx_pcie, bool enable)
{
if (enable) {
@@ -625,19 +618,20 @@ static int imx8mm_pcie_enable_ref_clk(struct imx_pcie *imx_pcie, bool enable)
{
int offset = imx_pcie_grp_offset(imx_pcie);
- if (enable) {
- regmap_clear_bits(imx_pcie->iomuxc_gpr, offset, IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE);
- regmap_set_bits(imx_pcie->iomuxc_gpr, offset, IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN);
- }
-
+ regmap_update_bits(imx_pcie->iomuxc_gpr, offset,
+ IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE,
+ enable ? 0 : IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE);
+ regmap_update_bits(imx_pcie->iomuxc_gpr, offset,
+ IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN,
+ enable ? IMX8MQ_GPR_PCIE_CLK_REQ_OVERRIDE_EN : 0);
return 0;
}
static int imx7d_pcie_enable_ref_clk(struct imx_pcie *imx_pcie, bool enable)
{
- if (!enable)
- regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
- IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
+ regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
+ IMX7D_GPR12_PCIE_PHY_REFCLK_SEL,
+ enable ? 0 : IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
return 0;
}
@@ -1522,7 +1516,6 @@ static const struct imx_pcie_drvdata drvdata[] = {
.clks_cnt = ARRAY_SIZE(imx6q_clks),
.mode_off[0] = IOMUXC_GPR12,
.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
- .init_phy = imx7d_pcie_init_phy,
.enable_ref_clk = imx7d_pcie_enable_ref_clk,
.core_reset = imx7d_pcie_core_reset,
},
--
2.37.1
next prev parent reply other threads:[~2024-09-24 3:50 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-24 3:27 [PATCH v1 0/9] A bunch of changes to refine i.MX PCIe driver Richard Zhu
2024-09-24 3:27 ` [PATCH v1 1/9] dt-bindings: imx6q-pcie: Add ref clock for i.MX95 PCIe Richard Zhu
2024-09-24 10:08 ` Conor Dooley
2024-09-24 15:23 ` Frank Li
2024-09-24 16:04 ` Conor Dooley
2024-09-25 2:31 ` Hongxing Zhu
2024-09-24 3:27 ` [PATCH v1 2/9] PCI: imx6: " Richard Zhu
2024-09-24 15:30 ` Frank Li
2024-09-24 3:27 ` [PATCH v1 3/9] PCI: imx6: Fetch dbi2 and iATU base addesses from DT Richard Zhu
2024-09-24 3:27 ` [PATCH v1 4/9] PCI: imx6: Correct controller_id generation logic for i.MX7D Richard Zhu
2024-09-24 15:31 ` Frank Li
2024-09-24 16:23 ` Frank Li
2024-09-24 3:27 ` [PATCH v1 5/9] PCI: imx6: Make core reset assertion deassertion symmetric Richard Zhu
2024-09-24 16:23 ` Frank Li
2024-09-24 3:27 ` Richard Zhu [this message]
2024-09-24 16:24 ` [PATCH v1 6/9] PCI: imx6: Make *_enable_ref_clk() function symmetric Frank Li
2024-09-24 3:27 ` [PATCH v1 7/9] PCI: imx6: Use dwc common suspend resume method Richard Zhu
2024-09-24 3:27 ` [PATCH v1 8/9] PCI: imx6: Add i.MX8MQ i.MX8Q and i.MX95 PCIe PM support Richard Zhu
2024-09-24 16:26 ` Frank Li
2024-09-24 3:27 ` [PATCH v1 9/9] arm64: dts: imx95: Add ref clock for i.MX95 PCIe Richard Zhu
2024-09-24 16:28 ` Frank Li
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