From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-m3270.qiye.163.com (mail-m3270.qiye.163.com [220.197.32.70]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1A3229A312 for ; Tue, 21 Oct 2025 07:49:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.32.70 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761032965; cv=none; b=j9YxuHz2LyFBivE2v4JFP6YcIxlwlmNVMqpzUJsu4vUuubnHozNRTGizVMM1lJdgf/lgtAlgX64OWSCJAhEPBCkQynph7UJTIsxU4OqFO+6vVZ6Qm2HlWsrpbU8Pt9n0w255iGVKFXoGYytAjMXd22Q34YuzPHNERn8/lfIrkKw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761032965; c=relaxed/simple; bh=ZT+ZkJ0Dotc27S5w7lGWwTr5fIB3nIokkMMhaK0wv5E=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=aNSDVaMpGGLHrumCwxDXyRFCSD/RioypjdlIwGOTjLTBC4L+DO5S7UBg75N4rSEXQIoIie6HY8TP/oOSbuYuZluw3KDwPWBEtr2eOdTvs8fR6Ll/mlUjlq7o56puJEc6PWONoCLJmSZte7Ls8hXVHMOayagg8KzkEcq8ae92Qnk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=GPbeA/Hu; arc=none smtp.client-ip=220.197.32.70 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="GPbeA/Hu" Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 26a1f52fc; Tue, 21 Oct 2025 15:49:18 +0800 (GMT+08:00) From: Shawn Lin To: Heiko Stuebner , Manivannan Sadhasivam , Bjorn Helgaas Cc: Thierry Reding , linux-rockchip@lists.infradead.org, Niklas Cassel , linux-pci@vger.kernel.org, Shawn Lin Subject: [PATCH 4/4] arm64: dts: rockchip: Add PCIe clkreq stuff for RK3588 EVB1 Date: Tue, 21 Oct 2025 15:48:27 +0800 Message-Id: <1761032907-154829-5-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1761032907-154829-1-git-send-email-shawn.lin@rock-chips.com> References: <1761032907-154829-1-git-send-email-shawn.lin@rock-chips.com> X-HM-Tid: 0a9a05be704409cckunm38953c58648290 X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZQhoZHVYeGE8eSEtNTh5DGktWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0 hVSktLVUpCS0tZBg++ DKIM-Signature: a=rsa-sha256; b=GPbeA/Hu/nckH1/F6KPmZa1j8jJ2qzdRbY7dcAiSfyBZWWaKwBivTkIVrQUDfFepoT3vrgLArnI7d8GI9L+wZbvt0dVijcstCs9SXGumYwR6kEUU1Utwt5ZeiTL/FuRs/GZBmK98M6xmetJv+lf5GHUp5vZwF580kT4g67b3aQQ=; s=default; c=relaxed/relaxed; d=rock-chips.com; v=1; bh=mBAxCGrCTd9wlaG397H8JWnqIiuZ9kVnamTzv/ECLFY=; h=date:mime-version:subject:message-id:from; Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Add supports-clkreq and pinmux for PCIe ASPM L1 substates. Signed-off-by: Shawn Lin --- arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts index ff1ba5ed56ef..c9d284cb738b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts @@ -522,6 +522,7 @@ &pcie2x1l0 { pinctrl-names = "default"; pinctrl-0 = <&pcie2_0_rst>, <&pcie2_0_wake>, <&pcie2_0_clkreq>, <&wifi_host_wake_irq>; reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; + supports-clkreq; vpcie3v3-supply = <&vcc3v3_wlan>; status = "okay"; @@ -545,7 +546,8 @@ wifi: wifi@0,0 { &pcie2x1l1 { reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; - pinctrl-0 = <&pcie2_1_rst>, <&rtl8111_isolate>; + pinctrl-0 = <&pcie2_1_rst>, <&rtl8111_isolate>, <&pcie30x1m1_1_clkreqn>; + supports-clkreq; status = "okay"; }; @@ -555,7 +557,8 @@ &pcie30phy { &pcie3x4 { pinctrl-names = "default"; - pinctrl-0 = <&pcie3_reset>; + pinctrl-0 = <&pcie3_reset>, <&pcie30x4m1_clkreqn>; + supports-clkreq; reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_pcie30>; status = "okay"; -- 2.43.0