From: Richard Yang <weiyang@linux.vnet.ibm.com>
To: linux-pci@vger.kernel.org
Cc: bhelgaas@google.com
Subject: Does my understanding correct?
Date: Fri, 27 Apr 2012 17:27:04 +0800 [thread overview]
Message-ID: <20120427092704.GA22529@richard> (raw)
All,
I draw a picture about the physical layout on a part of the pci system.
Each block represent a bridge or a device.
Am I correct?
+-----------------------------+
| |
| |
| Bus#2 |
| ------------------ |
| |
| |
| |
| +-------------+
| |DownStream |02:00.0 pci_dev
+---------------+-------+-----+
| Bus#3
---------------+------------------------------------------+---
| |
| |
+---------------+-------+-----+ +---------------+----+--+-----+
| |UpStream |03:00.0 | |UpStream |03:01.0
| +-------------+ | +-------------+ a normal device
| | | |
| | | |
| Bus#4 | | |
| ------------------- | | |
| +----------+ | |
| |DownStream| | |
+-----------------------+-----+ +-----------------------------+
|
| Bus#5
------------+------------
--
Richard Yang
Help you, Help me
next reply other threads:[~2012-04-27 9:27 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-27 9:27 Richard Yang [this message]
2012-04-27 14:10 ` Does my understanding correct? Jiang Liu
2012-04-27 15:55 ` Bjorn Helgaas
2012-04-27 14:17 ` Bjorn Helgaas
2012-04-28 5:01 ` Richard Yang
2012-04-28 7:21 ` Richard Yang
2012-04-30 15:56 ` Bjorn Helgaas
2012-05-02 6:24 ` Richard Yang
2012-05-02 14:59 ` Bjorn Helgaas
2012-05-02 21:05 ` Don Dutile
2012-05-03 6:21 ` Richard Yang
2012-05-03 16:39 ` Bjorn Helgaas
2012-05-04 2:11 ` Richard Yang
2012-05-06 15:21 ` Richard Yang
2012-05-07 3:00 ` Richard Yang
2012-04-28 8:21 ` Richard Yang
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