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From: Bjorn Helgaas <bhelgaas@google.com>
To: Wei Yang <weiyang@linux.vnet.ibm.com>
Cc: Yinghai Lu <yinghai@kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	Ram Pai <linuxram@us.ibm.com>,
	Gavin Shan <shangw@linux.vnet.ibm.com>
Subject: Re: [PATCH 4/4] PCI: fix the io resource alignment calculation in pbus_size_io()
Date: Tue, 6 Aug 2013 11:58:56 -0600	[thread overview]
Message-ID: <20130806175856.GA1246@google.com> (raw)
In-Reply-To: <20130806153410.GA10680@weiyang.vnet.ibm.com>

On Tue, Aug 06, 2013 at 11:34:10PM +0800, Wei Yang wrote:
> On Tue, Aug 06, 2013 at 07:39:29AM -0600, Bjorn Helgaas wrote:
> >> Personal Conclusion
> >> ============================================================================
> >> I think Bjorn's patch works.
> >> Will test on powernv platform and give the result.
> >
> >Great, let me know what happens.
> 
> In both case, with/with out your patch, the assignment result is the same.
> Below is the /proc/ioports file.
> 
> 00010000-0080ffff : /io-hub@3efe00000000/pciex@3efe00080000
>   00010000-00010fff : Legacy IO
>   00020000-0003ffff : PCI Bus 0000:01
>     00020000-0003ffff : PCI Bus 0000:02
>       00020000-0002ffff : PCI Bus 0000:40
>       00030000-0003ffff : PCI Bus 0000:a0
> 00820000-0101ffff : /io-hub@3efe00000000/pciex@3efe00090000
>   00820000-00820fff : Legacy IO
>   00830000-0083ffff : PCI Bus 0001:01
> 01030000-0182ffff : /io-hub@3efe00000000/pciex@3efe000a0000
>   01030000-01030fff : Legacy IO
>   01040000-0104ffff : PCI Bus 0002:01
> 01840000-0203ffff : /io-hub@3efe00000000/pciex@3efe000b0000
>   01840000-01840fff : Legacy IO
>   01850000-0185ffff : PCI Bus 0003:01
> 02050000-0284ffff : /io-hub@3efe00000000/pciex@3efe000c0000
>   02050000-02050fff : Legacy IO
>   02060000-0206ffff : PCI Bus 0004:01
> 02860000-0305ffff : /io-hub@3efe00000000/pciex@3efe000d0000
>   02860000-02860fff : Legacy IO
>   02870000-0287ffff : PCI Bus 0005:01
> 
> The arch_align is 0x10000. When sizing for Bus 0000:01, its child has a I/O
> bridge window with size 0x20000/alignment 0x10000. And the result
> [0x20000,0x3ffff] looks like size 0x20000/alignment 0x20000 or size
> 0x20000/alignment 0x10000. 

Obviously, an address with alignment of 0x20000 is *also* aligned to
0x10000.

> But I still think the alignment is 0x10000.

Yes, as it should be.  These are all bridge windows, which never have to be
aligned at more than 1K (if supported), 4K, or the arch alignment,
whichever is largest.

I *think* you're saying that the patch works correctly.

Bjorn

  reply	other threads:[~2013-08-06 17:59 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-02  9:31 [PATCH 0/4] optimization/fix/cleanup in pci_assign_unassigned_resources Wei Yang
2013-08-02  9:31 ` [PATCH 1/4] PCI: optimize pci_bus_get_depth() by enumerating on pci bus hierachy Wei Yang
2013-08-02  9:31 ` [PATCH 2/4] PCI: add comment for pbus_size_mem() parameter Wei Yang
2013-08-02  9:31 ` [PATCH 3/4] PCI: trivial cleanup in pbus_size_io() Wei Yang
2013-08-02  9:31 ` [PATCH 4/4] PCI: fix the io resource alignment calculation " Wei Yang
2013-08-02 22:51   ` Bjorn Helgaas
2013-08-05 17:58   ` Bjorn Helgaas
2013-08-05 19:05     ` Yinghai Lu
2013-08-05 19:51       ` Bjorn Helgaas
2013-08-05 20:52         ` Yinghai Lu
2013-08-05 20:59           ` Bjorn Helgaas
2013-08-05 21:09             ` Yinghai Lu
2013-08-05 22:21               ` Bjorn Helgaas
2013-08-06  6:15                 ` Wei Yang
2013-08-06 13:39                   ` Bjorn Helgaas
2013-08-06 15:34                     ` Wei Yang
2013-08-06 17:58                       ` Bjorn Helgaas [this message]
2013-08-07  2:01                         ` Wei Yang
     [not found]                 ` <20130806032227.GA7736@shangw.(null)>
2013-08-06  6:26                   ` Wei Yang
2013-08-06 13:42                     ` Bjorn Helgaas
     [not found]                 ` <52006bfc.6a5d3c0a.2753.ffffa6b7SMTPIN_ADDED_BROKEN@mx.google.com>
2013-08-06 13:35                   ` Bjorn Helgaas
2013-08-06  6:19     ` Wei Yang
2013-08-06 13:44       ` Bjorn Helgaas
2013-08-06 15:47         ` Wei Yang
2013-08-06 18:01           ` Bjorn Helgaas
2013-08-06 20:56             ` Bjorn Helgaas
2013-08-07  2:01               ` Wei Yang
  -- strict thread matches above, loose matches on Subject: below --
2013-07-01 15:10 [PATCH 0/4] optimization/fix/cleanup in pci_assign_unassigned_resources Wei Yang
2013-07-01 15:10 ` [PATCH 4/4] PCI: fix the io resource alignment calculation in pbus_size_io() Wei Yang
2013-07-08 21:15   ` Bjorn Helgaas
2013-07-09  3:20     ` Wei Yang
2013-07-09 17:38       ` Bjorn Helgaas
2013-07-10  1:34         ` Wei Yang
2013-07-19  3:10           ` Wei Yang
2013-07-25 21:22           ` Bjorn Helgaas

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