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From: Bjorn Helgaas <bhelgaas@google.com>
To: Martin Mares <mj@ucw.cz>
Cc: linux-pci@vger.kernel.org
Subject: [PATCH 4/7] lspci: Clarify "PCIe-to-PCI/PCI-X" desc and Bridge Retry Config Enable
Date: Mon, 09 Sep 2013 17:14:07 -0600	[thread overview]
Message-ID: <20130909231407.30095.68310.stgit@bhelgaas-glaptop> (raw)
In-Reply-To: <20130909231345.30095.61638.stgit@bhelgaas-glaptop>

The PCI_EXP_TYPE_PCI_BRIDGE type is a PCIe to PCI/PCI-X bridge, so be a bit
more complete in the comment and printed device type.  Also, per PCIe spec
r3.0, Table 7-14, the PCIe Device Control "Bridge Configuration Retry
Enable" bit only applies to PCIe-to-PCI/PCI-X bridges; it does not apply to
PCI-to-PCIe bridges.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
 lib/header.h |    4 ++--
 ls-caps.c    |    4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/header.h b/lib/header.h
index 6608003..cb63d40 100644
--- a/lib/header.h
+++ b/lib/header.h
@@ -728,8 +728,8 @@
 #define  PCI_EXP_TYPE_ROOT_PORT 0x4	/* Root Port */
 #define  PCI_EXP_TYPE_UPSTREAM	0x5	/* Upstream Port */
 #define  PCI_EXP_TYPE_DOWNSTREAM 0x6	/* Downstream Port */
-#define  PCI_EXP_TYPE_PCI_BRIDGE 0x7	/* PCI/PCI-X Bridge */
-#define  PCI_EXP_TYPE_PCIE_BRIDGE 0x8	/* PCI/PCI-X to PCIE Bridge */
+#define  PCI_EXP_TYPE_PCI_BRIDGE 0x7	/* PCIe to PCI/PCI-X Bridge */
+#define  PCI_EXP_TYPE_PCIE_BRIDGE 0x8	/* PCI/PCI-X to PCIe Bridge */
 #define  PCI_EXP_TYPE_ROOT_INT_EP 0x9	/* Root Complex Integrated Endpoint */
 #define  PCI_EXP_TYPE_ROOT_EC 0xa	/* Root Complex Event Collector */
 #define PCI_EXP_FLAGS_SLOT	0x0100	/* Slot implemented */
diff --git a/ls-caps.c b/ls-caps.c
index 7621010..de0d79e 100644
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -696,7 +696,7 @@ static void cap_express_dev(struct device *d, int where, int type)
 	FLAG(w, PCI_EXP_DEVCTL_PHANTOM),
 	FLAG(w, PCI_EXP_DEVCTL_AUX_PME),
 	FLAG(w, PCI_EXP_DEVCTL_NOSNOOP));
-  if (type == PCI_EXP_TYPE_PCI_BRIDGE || type == PCI_EXP_TYPE_PCIE_BRIDGE)
+  if (type == PCI_EXP_TYPE_PCI_BRIDGE)
     printf(" BrConfRtry%c", FLAG(w, PCI_EXP_DEVCTL_BCRE));
   if (((type == PCI_EXP_TYPE_ENDPOINT) || (type == PCI_EXP_TYPE_LEG_END)) &&
       (t & PCI_EXP_DEVCAP_FLRESET))
@@ -1105,7 +1105,7 @@ cap_express(struct device *d, int where, int cap)
       printf("Downstream Port (Slot%c)", FLAG(cap, PCI_EXP_FLAGS_SLOT));
       break;
     case PCI_EXP_TYPE_PCI_BRIDGE:
-      printf("PCI/PCI-X Bridge");
+      printf("PCI-Express to PCI/PCI-X Bridge");
       break;
     case PCI_EXP_TYPE_PCIE_BRIDGE:
       printf("PCI/PCI-X to PCI-Express Bridge");


  parent reply	other threads:[~2013-09-09 23:14 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-09 23:13 [PATCH 1/7] lspci: Label PCIe LnkCap "L0s Exit Latency" as "L0s", not "L0" Bjorn Helgaas
2013-09-09 23:13 ` [PATCH 2/7] lspci: Decode PCIe DevCap "Acceptable Latencies" only for Endpoints Bjorn Helgaas
2013-09-09 23:14 ` [PATCH 3/7] lspci: Decode PCIe DevCap/DevCtl FLReset " Bjorn Helgaas
2013-09-09 23:14 ` Bjorn Helgaas [this message]
2013-09-09 23:14 ` [PATCH 5/7] lspci: Decode PCIe LnkCtl "Read Completion Boundary" for PCIe-to-PCI bridges Bjorn Helgaas
2013-09-09 23:14 ` [PATCH 6/7] lspci: Drop PCIe LnkCtl "Retrain Link" decoding Bjorn Helgaas
2013-09-09 23:14 ` [PATCH 7/7] lspci: Decode PCIe LnkSta "Link Training" only for relevant functions Bjorn Helgaas
2013-11-10 11:33 ` [PATCH 1/7] lspci: Label PCIe LnkCap "L0s Exit Latency" as "L0s", not "L0" Martin Mares

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