From: Marek Vasut <marex@denx.de>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: "Zhu Richard-R65037" <r65037@freescale.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Shawn Guo <shawn.guo@linaro.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"tharvey@gateworks.com" <tharvey@gateworks.com>,
Frank Li <lznuaa@gmail.com>, Sean Cross <xobs@kosagi.com>,
Sascha Hauer <s.hauer@pengutronix.de>
Subject: Re: [PATCH v7 0/2] Add PCIe support for i.MX6q
Date: Thu, 10 Oct 2013 17:58:34 +0200 [thread overview]
Message-ID: <201310101758.35085.marex@denx.de> (raw)
In-Reply-To: <CAErSpo7oHK1tyndKdgk_6f3F7O0pMCSUV+RLUy0V75OKKFniow@mail.gmail.com>
Hi Bjorn,
> On Thu, Oct 10, 2013 at 4:25 AM, Marek Vasut <marex@denx.de> wrote:
> > In the meantime, this is what I see upon probe with V6 of the patches:
> >
> > Linux version 3.12.0-rc2-next-20130927+
> > [...]
> > imx6q-pcie 1ffc000.pcie: phy link never came up
> > PCI host bridge to bus 0000:00
> > pci_bus 0000:00: root bus resource [io 0x1000-0x10000]
> > pci_bus 0000:00: root bus resource [mem 0x01000000-0x01efffff]
> > pci_bus 0000:00: No busn resource found for root bus, will use [bus
> > 00-ff]
>
> This indicates a bug in your host bridge driver. You must supply the
> bus number range claimed by the host bridge. There's no way the PCI
> core can figure that out itself. We do assume [bus 00-ff], but that's
> only a fallback and will prevent multi-host bridge configurations from
> working.
>
> > PCI: bus0: Fast back to back transfers disabled
> > PCI: bus1: Fast back to back transfers enabled
> > PCI: Device 0000:00:00.0 not available because of resource collisions
> > pcieport: probe of 0000:00:00.0 failed with error -22
>
> If you boot with "ignore_loglevel", you should see more details about
> this device, including the BAR values we read from it. Based on
> pcibios_enable_device() in arch/arm/kernel/bios32.c, my guess is that
> 00:00.0 has an uninitialized BAR (maybe it is in power-on state), and
> you didn't do anything to assign the BAR before trying to bind the
> pcieport driver to it. You might be missing a call to
> pci_bus_assign_resources() or pci_assign_unassigned_resources().
I tried you suggestion, this is what I got now (and with V7 of the patches):
Note that my topology is: rootport->2_port_switch->ethernet_chip , the other
port of the switch is not used .
imx6q-pcie 1ffc000.pcie: phy link never came up
PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [io 0x1000-0x10000]
pci_bus 0000:00: root bus resource [mem 0x01000000-0x01efffff]
pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
pci_bus 0000:00: scanning bus
pci 0000:00:00.0: [16c3:abcd] type 01 class 0x060400
pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff]
pci 0000:00:00.0: reg 0x38: [mem 0x00000000-0x0000ffff pref]
pci 0000:00:00.0: calling pci_fixup_ide_bases+0x0/0x5c
pci 0000:00:00.0: supports D1
pci 0000:00:00.0: PME# supported from D0 D1 D3hot D3cold
pci 0000:00:00.0: PME# disabled
pci_bus 0000:00: fixups for bus
PCI: bus0: Fast back to back transfers disabled
pci 0000:00:00.0: scanning [bus 01-01] behind bridge, pass 0
pci 0000:00:00.0: scanning [bus 00-00] behind bridge, pass 1
pci_bus 0000:01: scanning bus
pci_bus 0000:01: fixups for bus
PCI: bus1: Fast back to back transfers enabled
pci_bus 0000:01: bus scan returning with max=01
pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
pci_bus 0000:00: bus scan returning with max=01
pci_bus 0000:00: busn_res: [bus 00-ff] end is updated to 01
PCI: Device 0000:00:00.0 not available because of resource collisions
pcieport: probe of 0000:00:00.0 failed with error -22
pci 0000:00:00.0: fixup irq: got 155
pci 0000:00:00.0: assigning IRQ 155
pci 0000:00:00.0: BAR 0: assigned [mem 0x01000000-0x010fffff]
pci 0000:00:00.0: BAR 0: set to [mem 0x01000000-0x010fffff] (PCI address
[0x1000000-0x10
fffff])
pci 0000:00:00.0: BAR 6: assigned [mem 0x01100000-0x0110ffff pref]
pci 0000:00:00.0: PCI bridge to [bus 01]
pci 0000:00:00.0: PCI bridge to [bus 01]
pci_bus 0000:00: resource 4 [io 0x1000-0x10000]
pci_bus 0000:00: resource 5 [mem 0x01000000-0x01efffff]
What is this conflicting device 0000:00:01 I observe here? Does it have to do
with the switch ?
Best regards,
Marek Vasut
next prev parent reply other threads:[~2013-10-10 15:58 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-26 3:24 [PATCH v7 0/2] Add PCIe support for i.MX6q Shawn Guo
2013-09-26 3:24 ` [PATCH v7 1/2] ARM: imx6q: Add PCIe bits to GPR syscon definition Shawn Guo
2013-09-26 3:24 ` [PATCH v7 2/2] PCI: imx6: Add support for i.MX6 PCIe controller Shawn Guo
2013-09-27 19:24 ` [PATCH v7 0/2] Add PCIe support for i.MX6q Bjorn Helgaas
2013-09-28 6:56 ` Shawn Guo
2013-10-08 20:56 ` Marek Vasut
2013-10-09 5:23 ` Zhu Richard-R65037
2013-10-10 10:25 ` Marek Vasut
2013-10-10 10:40 ` Zhu Richard-R65037
2013-10-10 12:59 ` Marek Vasut
2013-10-10 20:33 ` Tim Harvey
2013-10-10 20:40 ` Marek Vasut
2013-10-10 13:27 ` Bjorn Helgaas
2013-10-10 13:43 ` Marek Vasut
2013-10-10 15:58 ` Marek Vasut [this message]
2013-10-10 17:17 ` Bjorn Helgaas
2013-10-10 17:39 ` Marek Vasut
2013-10-10 17:56 ` Bjorn Helgaas
2013-10-11 2:12 ` [PATCH 1/2] PCI: imx6: Make reset-gpio optional Marek Vasut
2013-10-11 2:12 ` [PATCH 2/2] PCI: imx6: Fix the clock for PCIe Marek Vasut
2013-10-11 7:20 ` Jingoo Han
2013-10-11 11:55 ` Marek Vasut
2013-10-12 7:13 ` Shawn Guo
2013-10-11 7:09 ` [PATCH 1/2] PCI: imx6: Make reset-gpio optional Jingoo Han
2013-10-12 7:20 ` Shawn Guo
2013-10-12 9:28 ` Marek Vasut
2013-10-14 0:02 ` Jingoo Han
2013-10-14 0:44 ` Marek Vasut
2013-10-14 1:17 ` Marek Vasut
2013-10-14 2:33 ` Jingoo Han
2013-10-14 3:23 ` Marek Vasut
2013-10-11 2:13 ` [PATCH v7 0/2] Add PCIe support for i.MX6q Marek Vasut
2013-10-11 2:18 ` Marek Vasut
2013-10-11 2:29 ` Zhu Richard-R65037
2013-10-11 4:44 ` Yinghai Lu
2013-10-11 14:44 ` Marek Vasut
2013-10-11 15:24 ` Tim Harvey
2013-10-11 20:13 ` Marek Vasut
2013-10-12 2:16 ` Zhu Richard-R65037
2013-10-12 2:30 ` Marek Vasut
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