From: Arnd Bergmann <arnd@arndb.de>
To: linux-arm-kernel@lists.infradead.org
Cc: Mohit Kumar <mohit.kumar@st.com>,
linux-pci@vger.kernel.org, Pratyush Anand <pratyush.anand@st.com>,
spear-devel@list.st.com, Viresh Kumar <viresh.linux@gmail.com>
Subject: Re: [PATCH 03/12] SPEAr13xx: Add SPEAr1310 PCIe register definitions
Date: Wed, 11 Dec 2013 23:51:24 +0100 [thread overview]
Message-ID: <201312112351.24603.arnd@arndb.de> (raw)
In-Reply-To: <3a008bd5223b1da9f17ceac745b3fc08b6b842e3.1386752447.git.mohit.kumar@st.com>
On Wednesday 11 December 2013, Mohit Kumar wrote:
> diff --git a/arch/arm/mach-spear/include/mach/spear.h b/arch/arm/mach-spear/include/mach/spear.h
> index 4526f75..c236cef 100644
> --- a/arch/arm/mach-spear/include/mach/spear.h
> +++ b/arch/arm/mach-spear/include/mach/spear.h
> @@ -140,6 +140,79 @@
> (SPEAR1340_MIPHY_OSC_BYPASS_EXT | \
> SPEAR1340_MIPHY_PLL_RATIO_TOP(25))
>
> +#define VA_SPEAR1310_PCIE_SATA_CFG (VA_MISC_BASE + 0x3A4)
> + #define SPEAR1310_PCIE_SATA2_SEL_PCIE (0 << 31)
> + #define SPEAR1310_PCIE_SATA1_SEL_PCIE (0 << 30)
> + #define SPEAR1310_PCIE_SATA0_SEL_PCIE (0 << 29)
> + #define SPEAR1310_PCIE_SATA2_SEL_SATA (1 << 31)
> + #define SPEAR1310_PCIE_SATA1_SEL_SATA (1 << 30)
> + #define SPEAR1310_PCIE_SATA0_SEL_SATA (1 << 29)
These should definitely be part of the PHY driver.
Regarding style, don't use a hardcoded VA_MISC_BASE constant here,
but find the right address in the driver, and instead of shifting
bits, just use hexadecimal notation:
#define SPEAR1310_PCIE_SATA2_SEL_PCIE 0x80000000
#define SPEAR1310_PCIE_SATA1_SEL_PCIE 0x40000000
...
However, if you have a "reset" driver, you can use #reset-cells=<1>
and pass the bit as the reset specifier.
Arnd
next prev parent reply other threads:[~2013-12-11 22:51 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-11 9:38 [PATCH 00/12] PCI:Add SPEAr13xx PCie support Mohit Kumar
2013-12-11 9:38 ` [PATCH 01/12] SPEAr13xx: Correct dt field name for stmmac phy-addr Mohit Kumar
2013-12-11 11:09 ` Rajeev kumar
2013-12-11 11:14 ` Rajeev kumar
2013-12-12 0:39 ` Jingoo Han
2013-12-12 3:59 ` Rajeev kumar
2013-12-12 4:07 ` Chen-Yu Tsai
2013-12-12 5:13 ` Mohit KUMAR DCG
2013-12-11 9:38 ` [PATCH 02/12] SPEAr13xx: Move SPEAr1340 definitions to header file Mohit Kumar
2013-12-11 22:48 ` Arnd Bergmann
2013-12-13 4:18 ` Mohit KUMAR DCG
2013-12-14 19:02 ` Arnd Bergmann
2014-01-16 7:25 ` Mohit KUMAR DCG
2014-01-16 9:19 ` Pratyush Anand
2014-01-16 11:33 ` Arnd Bergmann
2014-01-16 11:45 ` Pratyush Anand
2013-12-11 9:38 ` [PATCH 03/12] SPEAr13xx: Add SPEAr1310 PCIe register definitions Mohit Kumar
2013-12-11 22:51 ` Arnd Bergmann [this message]
2013-12-11 9:38 ` [PATCH 04/12] SPEAr13xx: Fix static mapping table Mohit Kumar
2013-12-11 9:38 ` [PATCH 05/12] clk: SPEAr13xx: Fix pcie clock name Mohit Kumar
2013-12-11 22:42 ` Arnd Bergmann
2013-12-12 5:00 ` Mohit KUMAR DCG
2013-12-12 21:30 ` Arnd Bergmann
2013-12-11 9:38 ` [PATCH 06/12] pcie: designware: Move register definition to the header file Mohit Kumar
2013-12-11 11:38 ` Jagan Teki
2013-12-11 11:55 ` Mohit KUMAR DCG
2013-12-11 12:04 ` Jagan Teki
2013-12-11 21:31 ` Arnd Bergmann
2013-12-11 22:48 ` Jingoo Han
2013-12-12 4:55 ` Mohit KUMAR DCG
2013-12-11 9:38 ` [PATCH 07/12] pcie: designware: add dw_pcie prefix before cfg_read/write Mohit Kumar
2013-12-11 11:40 ` Jagan Teki
2013-12-12 1:12 ` Jingoo Han
2013-12-12 1:05 ` Jingoo Han
2013-12-20 16:35 ` Bjorn Helgaas
2013-12-11 9:38 ` [PATCH 08/12] pcie: designware: Fix IO transfers Mohit Kumar
2013-12-11 10:03 ` Marek Vasut
2013-12-11 11:29 ` Jagan Teki
2013-12-12 1:17 ` Jingoo Han
2013-12-20 3:47 ` Pratyush Anand
2013-12-11 13:34 ` Arnd Bergmann
2013-12-11 23:34 ` Jingoo Han
2013-12-20 16:36 ` Bjorn Helgaas
2013-12-11 9:38 ` [PATCH 09/12] pcie: SPEAr13xx: Add designware pcie support Mohit Kumar
2013-12-11 23:00 ` Arnd Bergmann
2013-12-13 4:30 ` Mohit KUMAR DCG
2013-12-13 4:57 ` Jingoo Han
2013-12-14 19:01 ` Arnd Bergmann
2013-12-11 9:38 ` [PATCH 10/12] SPEAr13xx: defconfig: Update Mohit Kumar
2013-12-11 10:47 ` Rajeev kumar
2013-12-12 4:47 ` Mohit KUMAR DCG
2013-12-11 9:38 ` [PATCH 11/12] MAINTAINERS: Add ST SPEAr13xx PCIe driver maintainer Mohit Kumar
2013-12-12 1:55 ` Jingoo Han
2013-12-11 9:38 ` [PATCH 12/12] MAINTAINERS: Add Synopsis Designware " Mohit Kumar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=201312112351.24603.arnd@arndb.de \
--to=arnd@arndb.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-pci@vger.kernel.org \
--cc=mohit.kumar@st.com \
--cc=pratyush.anand@st.com \
--cc=spear-devel@list.st.com \
--cc=viresh.linux@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).