* [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
@ 2014-02-03 7:07 Taku Izumi
2014-02-12 0:49 ` Bjorn Helgaas
0 siblings, 1 reply; 16+ messages in thread
From: Taku Izumi @ 2014-02-03 7:07 UTC (permalink / raw)
To: linux-pci, bhelgaas, yinghai
I found the problem that the present bit does not be cleared
though the slot is empty.
Step to reproduce:
# cd /sys/bus/pci/slots/66
# cat adapter
0
--- (insert PCIe card on slot#66) ---
# cat adapter
1
# echo 1 > power
# echo 0 > power
--- (eject PCIe card on slot#66) ---
# cat adapter
1
==> should be 0.
According to git-bisect this is caused by:
2debd9289997fc5d1c0043b41201a8b40d5e11d0
PCI: pciehp: Disable/enable link during slot power off/on
is the first bad commit
By reverting the above patch, this bug can be solved.
And I also found this can be fixed by changing the timing of link-disable
during power off the slot.
So, this patch changes the timing of link-disable during power off.
Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com>
---
drivers/pci/hotplug/pciehp_hpc.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 14acfcc..163f0b4 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -508,7 +508,12 @@ void pciehp_power_off_slot(struct slot * slot)
{
struct controller *ctrl = slot->ctrl;
- /* Disable the link at first */
+ pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_OFF, PCI_EXP_SLTCTL_PCC);
+ ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
+ pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,
+ PCI_EXP_SLTCTL_PWR_OFF);
+
+ /* Disable the link */
pciehp_link_disable(ctrl);
/* wait the link is down */
if (ctrl->link_active_reporting)
@@ -516,10 +521,6 @@ void pciehp_power_off_slot(struct slot * slot)
else
msleep(1000);
- pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_OFF, PCI_EXP_SLTCTL_PCC);
- ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
- pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,
- PCI_EXP_SLTCTL_PWR_OFF);
}
static irqreturn_t pcie_isr(int irq, void *dev_id)
--
1.8.3.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-03 7:07 [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty Taku Izumi
@ 2014-02-12 0:49 ` Bjorn Helgaas
2014-02-12 8:00 ` Izumi, Taku
0 siblings, 1 reply; 16+ messages in thread
From: Bjorn Helgaas @ 2014-02-12 0:49 UTC (permalink / raw)
To: Taku Izumi; +Cc: linux-pci, yinghai, Rajat Jain
[+cc Rajat]
On Mon, Feb 03, 2014 at 04:07:24PM +0900, Taku Izumi wrote:
>
> I found the problem that the present bit does not be cleared
> though the slot is empty.
>
> Step to reproduce:
>
> # cd /sys/bus/pci/slots/66
> # cat adapter
> 0
> --- (insert PCIe card on slot#66) ---
> # cat adapter
> 1
> # echo 1 > power
> # echo 0 > power
> --- (eject PCIe card on slot#66) ---
> # cat adapter
> 1
> ==> should be 0.
>
> According to git-bisect this is caused by:
> 2debd9289997fc5d1c0043b41201a8b40d5e11d0
> PCI: pciehp: Disable/enable link during slot power off/on
> is the first bad commit
>
> By reverting the above patch, this bug can be solved.
> And I also found this can be fixed by changing the timing of link-disable
> during power off the slot.
> So, this patch changes the timing of link-disable during power off.
Hi Taku,
Thanks a lot for finding and bisecting this problem. I recently merged
some patches from Rajat that partially revert 2debd9289997. Can you try
out my pci/pciehp branch and see whether it is enough to fix the problem
for you?
Here's the branch:
http://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=pci/pciehp
and the specific change Rajat made is:
http://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=pci/pciehp&id=b1811d2455f32754cc3d8725bf2e961c5eda2a72
Let me know if that isn't enough to fix the problem you're seeing, and we
can work on it some more.
Bjorn
>
> Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com>
> ---
> drivers/pci/hotplug/pciehp_hpc.c | 11 ++++++-----
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
> index 14acfcc..163f0b4 100644
> --- a/drivers/pci/hotplug/pciehp_hpc.c
> +++ b/drivers/pci/hotplug/pciehp_hpc.c
> @@ -508,7 +508,12 @@ void pciehp_power_off_slot(struct slot * slot)
> {
> struct controller *ctrl = slot->ctrl;
>
> - /* Disable the link at first */
> + pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_OFF, PCI_EXP_SLTCTL_PCC);
> + ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
> + pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,
> + PCI_EXP_SLTCTL_PWR_OFF);
> +
> + /* Disable the link */
> pciehp_link_disable(ctrl);
> /* wait the link is down */
> if (ctrl->link_active_reporting)
> @@ -516,10 +521,6 @@ void pciehp_power_off_slot(struct slot * slot)
> else
> msleep(1000);
>
> - pcie_write_cmd(ctrl, PCI_EXP_SLTCTL_PWR_OFF, PCI_EXP_SLTCTL_PCC);
> - ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
> - pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL,
> - PCI_EXP_SLTCTL_PWR_OFF);
> }
>
> static irqreturn_t pcie_isr(int irq, void *dev_id)
> --
> 1.8.3.1
>
^ permalink raw reply [flat|nested] 16+ messages in thread* RE: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-12 0:49 ` Bjorn Helgaas
@ 2014-02-12 8:00 ` Izumi, Taku
2014-02-12 16:56 ` Bjorn Helgaas
0 siblings, 1 reply; 16+ messages in thread
From: Izumi, Taku @ 2014-02-12 8:00 UTC (permalink / raw)
To: Bjorn Helgaas; +Cc: linux-pci@vger.kernel.org, yinghai@kernel.org, Rajat Jain
Hi Bjorn,
> Hi Taku,
>
> Thanks a lot for finding and bisecting this problem. I recently merged
> some patches from Rajat that partially revert 2debd9289997. Can you try
> out my pci/pciehp branch and see whether it is enough to fix the problem
> for you?
>
> Here's the branch:
> http://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=pci/pciehp
>
> and the specific change Rajat made is:
> http://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=pci/pciehp&id=b1811d2455f32754cc3d8725bf2e961c
> 5eda2a72
>
> Let me know if that isn't enough to fix the problem you're seeing, and we
> can work on it some more.
I tested the kernel checkouted from remotes/origin/pci/pciehp.
The original problem I reported was fixed.
However the sequence of hot-plug operation got changed.
The slot power becomes ON the moment when I insert PCIe card on the slot.
This behavior is unacceptable to me.
(before)
- hot-add
1. insert PCIe card
2. echo 1 > power
- hot-remove
1. echo 0 > power
2. eject PCIe card
(after)
- hot-add
1. insert PCIe card (and automatically power-on)
- hot-remove
1. echo 0 > power
2. eject PCIe card
Best regards,
Taku Izumi
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-12 8:00 ` Izumi, Taku
@ 2014-02-12 16:56 ` Bjorn Helgaas
2014-02-12 18:11 ` Rajat Jain
0 siblings, 1 reply; 16+ messages in thread
From: Bjorn Helgaas @ 2014-02-12 16:56 UTC (permalink / raw)
To: Izumi, Taku; +Cc: linux-pci@vger.kernel.org, yinghai@kernel.org, Rajat Jain
On Wed, Feb 12, 2014 at 1:00 AM, Izumi, Taku <izumi.taku@jp.fujitsu.com> wrote:
> Hi Bjorn,
>
>> Hi Taku,
>>
>> Thanks a lot for finding and bisecting this problem. I recently merged
>> some patches from Rajat that partially revert 2debd9289997. Can you try
>> out my pci/pciehp branch and see whether it is enough to fix the problem
>> for you?
>>
>> Here's the branch:
>> http://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=pci/pciehp
>>
>> and the specific change Rajat made is:
>> http://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=pci/pciehp&id=b1811d2455f32754cc3d8725bf2e961c
>> 5eda2a72
>>
>> Let me know if that isn't enough to fix the problem you're seeing, and we
>> can work on it some more.
>
> I tested the kernel checkouted from remotes/origin/pci/pciehp.
> The original problem I reported was fixed.
> However the sequence of hot-plug operation got changed.
> The slot power becomes ON the moment when I insert PCIe card on the slot.
> This behavior is unacceptable to me.
>
> (before)
> - hot-add
> 1. insert PCIe card
> 2. echo 1 > power
> - hot-remove
> 1. echo 0 > power
> 2. eject PCIe card
>
> (after)
> - hot-add
> 1. insert PCIe card (and automatically power-on)
>
> - hot-remove
> 1. echo 0 > power
> 2. eject PCIe card
Huh, that doesn't sound good. Does your slot have an attention
button? Can you collect the "lspci -vvv" output for the Downstream
Port leading to this slot?
I think that for ExpressCard and similar devices, we want to turn on
the device and attach a driver as soon as the card is inserted. But
in your case, I assume we want a model like that in Table 2-7 of the
"PCI Standard Hot-Plug Controller and Subsystem Specification," rev
1.0, i.e., "Hot Insertion Initiated via Software UI." So there must
be some way to differentiate an ExpressCard slot from a slot like
yours.
Bjorn
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-12 16:56 ` Bjorn Helgaas
@ 2014-02-12 18:11 ` Rajat Jain
2014-02-13 8:00 ` Izumi, Taku
0 siblings, 1 reply; 16+ messages in thread
From: Rajat Jain @ 2014-02-12 18:11 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Izumi, Taku, linux-pci@vger.kernel.org, yinghai@kernel.org,
Rajat Jain, Guenter Roeck
Hello,
On Wed, Feb 12, 2014 at 8:56 AM, Bjorn Helgaas <bhelgaas@google.com> wrote:
> On Wed, Feb 12, 2014 at 1:00 AM, Izumi, Taku <izumi.taku@jp.fujitsu.com> wrote:
>> Hi Bjorn,
>>
>>> Hi Taku,
>>>
>>> Thanks a lot for finding and bisecting this problem. I recently merged
>>> some patches from Rajat that partially revert 2debd9289997. Can you try
>>> out my pci/pciehp branch and see whether it is enough to fix the problem
>>> for you?
>>>
>>> Here's the branch:
>>> http://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=pci/pciehp
>>>
>>> and the specific change Rajat made is:
>>> http://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=pci/pciehp&id=b1811d2455f32754cc3d8725bf2e961c
>>> 5eda2a72
>>>
>>> Let me know if that isn't enough to fix the problem you're seeing, and we
>>> can work on it some more.
>>
>> I tested the kernel checkouted from remotes/origin/pci/pciehp.
>> The original problem I reported was fixed.
>> However the sequence of hot-plug operation got changed.
>> The slot power becomes ON the moment when I insert PCIe card on the slot.
>> This behavior is unacceptable to me.
>>
>> (before)
>> - hot-add
>> 1. insert PCIe card
>> 2. echo 1 > power
>> - hot-remove
>> 1. echo 0 > power
>> 2. eject PCIe card
>>
>> (after)
>> - hot-add
>> 1. insert PCIe card (and automatically power-on)
>>
>> - hot-remove
>> 1. echo 0 > power
>> 2. eject PCIe card
>
> Huh, that doesn't sound good. Does your slot have an attention
> button? Can you collect the "lspci -vvv" output for the Downstream
> Port leading to this slot?
If there is no attention button, then the behavior seen, matches with
what I expected of the code.
Seemingly, the HW does not have a power controller (and attention
button), thus the power is automatically turned on (by HW) when card
is inserted and the link comes up. Thus prior to link state based
hot-plug, "echo 1 > power" used to do a little else than initiate a
rescan for this particular HW.
>
> I think that for ExpressCard and similar devices, we want to turn on
> the device and attach a driver as soon as the card is inserted. But
> in your case, I assume we want a model like that in Table 2-7 of the
> "PCI Standard Hot-Plug Controller and Subsystem Specification," rev
> 1.0, i.e., "Hot Insertion Initiated via Software UI." So there must
> be some way to differentiate an ExpressCard slot from a slot like
> yours.
Yes, that would help if there was some way.
Thanks,
Rajat
>
> Bjorn
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-12 18:11 ` Rajat Jain
@ 2014-02-13 8:00 ` Izumi, Taku
2014-02-13 16:03 ` Rajat Jain
0 siblings, 1 reply; 16+ messages in thread
From: Izumi, Taku @ 2014-02-13 8:00 UTC (permalink / raw)
To: rajatxjain@gmail.com, Bjorn Helgaas
Cc: linux-pci@vger.kernel.org, yinghai@kernel.org, Rajat Jain,
Guenter Roeck
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^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-13 8:00 ` Izumi, Taku
@ 2014-02-13 16:03 ` Rajat Jain
2014-02-13 16:37 ` Takashi Iwai
2014-02-14 7:21 ` Izumi, Taku
0 siblings, 2 replies; 16+ messages in thread
From: Rajat Jain @ 2014-02-13 16:03 UTC (permalink / raw)
To: Izumi, Taku, rajatxjain@gmail.com, Bjorn Helgaas
Cc: linux-pci@vger.kernel.org, yinghai@kernel.org, Guenter Roeck,
Takashi Iwai
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Cj4gVGFrdSBJenVtaQ0KDQo=
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-13 16:03 ` Rajat Jain
@ 2014-02-13 16:37 ` Takashi Iwai
2014-02-13 17:56 ` Rajat Jain
2014-02-14 7:21 ` Izumi, Taku
1 sibling, 1 reply; 16+ messages in thread
From: Takashi Iwai @ 2014-02-13 16:37 UTC (permalink / raw)
To: Rajat Jain
Cc: Izumi, Taku, rajatxjain@gmail.com, Bjorn Helgaas,
linux-pci@vger.kernel.org, yinghai@kernel.org, Guenter Roeck
At Thu, 13 Feb 2014 16:03:30 +0000,
Rajat Jain wrote:
>
> [+Takashi]
>
> Hello,
> >
> > > > Huh, that doesn't sound good. Does your slot have an attention
> > > > button? Can you collect the "lspci -vvv" output for the Downstream
> > > > Port leading to this slot?
> >
> > The slots have no Attention button and are not for ExpressCard.
> > lspci -vvv output is:
> >
> > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop-
> > ParErr+ Stepping- SERR+ FastB2B- DisINTx+
> > Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort-
> > <TAbort- <MAbort- >SERR- <PERR- INTx-
> > Latency: 0
> > Bus: primary=2c, secondary=2d, subordinate=2f, sec-latency=0
> > I/O behind bridge: 0000f000-00000fff
> > Memory behind bridge: b1800000-b1ffffff
> > Prefetchable memory behind bridge: 00000000ae800000-
> > 00000000aeffffff
> > Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort-
> > <TAbort- <MAbort- <SERR- <PERR-
> > BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
> > PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> > Capabilities: [40] Power Management version 3
> > Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-
> > ,D2-,D3hot+,D3cold+)
> > Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
> > Capabilities: [48] MSI: Enable+ Count=1/8 Maskable+ 64bit+
> > Address: 00000000fee00518 Data: 0000
> > Masking: 000000fe Pending: 00000000
> > Capabilities: [68] Express (v2) Downstream Port (Slot+), MSI 00
> > DevCap: MaxPayload 2048 bytes, PhantFunc 0, Latency L0s
> > <64ns, L1 <1us
> > ExtTag- RBE+ FLReset-
> > DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+
> > Unsupported-
> > RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
> > MaxPayload 128 bytes, MaxReadReq 128 bytes
> > DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr-
> > TransPend-
> > LnkCap: Port #1, Speed 8GT/s, Width x8, ASPM L1, Latency
> > L0 <4us, L1 <4us
> > ClockPM- Surprise+ LLActRep+ BwNot+
> > LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
> > ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> > LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+
> > DLActive- BWMgmt- ABWMgmt-
> > SltCap: AttnBtn- PwrCtrl+ MRL+ AttnInd+ PwrInd+ HotPlug+
> > Surprise-
> > Slot #67, PowerLimit 25.000W; Interlock-
> > NoCompl-
>
> Hmm... I see that the Slot has a power controller. Which means that the power to the slot shall not be turned on automatically (by HW) when the card is plugged in. Also meaning that the link will not come up automatically - so this does not seem like the Link state based hotplug kicking in.
>
> What I suspect is this one:
>
> f02d1843d83b "PCI: pciehp: Remove surprise bit checks"
>
> Since this patch removes *all* the surprise bit checks causing all the presence detect changes (including 0->1) to be initiate hotplug. I think it may be worthwhile to try it out while removing this particular hunk:
>
> @@ -535,8 +535,6 @@ static void interrupt_event_handler(struct work_struct *work)
> break;
> case INT_PRESENCE_ON:
> case INT_PRESENCE_OFF:
> - if (!HP_SUPR_RM(ctrl))
> - break;
> ctrl_dbg(ctrl, "Surprise Removal\n");
> handle_surprise_event(p_slot);
> break;
>
> May be we should remove the surprise check for INT_PRESENCE_OFF only (and let it stay for INT_PRESEWNCE_ON)?
I checked my test devices, and they seem to have no power controller
bit involved. So I double-checked the recent commits, and indeed
Rajat's recent work already fixed the detection (presumed that the
commit [e48f1b67: PCI: pciehp: Use link change notifications for
hot-plug and removal] does it) without fiddling with the surprise
bit.
That said, my patch can be reverted completely. Can anyone check
whether it cures?
thanks,
Takashi
^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-13 16:37 ` Takashi Iwai
@ 2014-02-13 17:56 ` Rajat Jain
0 siblings, 0 replies; 16+ messages in thread
From: Rajat Jain @ 2014-02-13 17:56 UTC (permalink / raw)
To: Takashi Iwai
Cc: Izumi, Taku, rajatxjain@gmail.com, Bjorn Helgaas,
linux-pci@vger.kernel.org, yinghai@kernel.org, Guenter Roeck
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^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-13 16:03 ` Rajat Jain
2014-02-13 16:37 ` Takashi Iwai
@ 2014-02-14 7:21 ` Izumi, Taku
2014-02-14 7:26 ` Rajat Jain
2014-02-14 17:31 ` Bjorn Helgaas
1 sibling, 2 replies; 16+ messages in thread
From: Izumi, Taku @ 2014-02-14 7:21 UTC (permalink / raw)
To: Rajat Jain, rajatxjain@gmail.com, Bjorn Helgaas
Cc: linux-pci@vger.kernel.org, yinghai@kernel.org, Guenter Roeck,
Takashi Iwai
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^ permalink raw reply [flat|nested] 16+ messages in thread
* RE: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-14 7:21 ` Izumi, Taku
@ 2014-02-14 7:26 ` Rajat Jain
2014-02-14 17:31 ` Bjorn Helgaas
1 sibling, 0 replies; 16+ messages in thread
From: Rajat Jain @ 2014-02-14 7:26 UTC (permalink / raw)
To: Izumi, Taku, rajatxjain@gmail.com, Bjorn Helgaas
Cc: linux-pci@vger.kernel.org, yinghai@kernel.org, Guenter Roeck,
Takashi Iwai
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enVtaQ0KDQo=
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-14 7:21 ` Izumi, Taku
2014-02-14 7:26 ` Rajat Jain
@ 2014-02-14 17:31 ` Bjorn Helgaas
2014-02-14 19:39 ` Rajat Jain
1 sibling, 1 reply; 16+ messages in thread
From: Bjorn Helgaas @ 2014-02-14 17:31 UTC (permalink / raw)
To: Izumi, Taku
Cc: Rajat Jain, rajatxjain@gmail.com, linux-pci@vger.kernel.org,
yinghai@kernel.org, Guenter Roeck, Takashi Iwai
On Fri, Feb 14, 2014 at 12:21 AM, Izumi, Taku <izumi.taku@jp.fujitsu.com> wrote:
>> Hmm... I see that the Slot has a power controller. Which means that the power to the slot shall not be turned on automatically
>> (by HW) when the card is plugged in. Also meaning that the link will not come up automatically - so this does not seem
>> like the Link state based hotplug kicking in.
>>
>> What I suspect is this one:
>>
>> f02d1843d83b "PCI: pciehp: Remove surprise bit checks"
>
> You are right.
> In case of omitting comit-f02d1843, it worked as expected.
> Slot power doesn't become ON automatically when PCIe card is inserted.
OK, I dropped f02d1843d83b ("PCI: pciehp: Remove surprise bit
checks"). Thanks for testing, everybody!
I think our handling of slot capabilities and control is a bit
haphazard. It seems like we're mostly responding to things that
break, and we don't really have a coherent explanation of how things
*should* work in different configurations. I think it would be good
if somebody wrote up something for Documentation/PCI, with references
to the relevant specifications, that describes how we think things
should work. For example, I think we have at least four models:
1) ExpressCard
2) Slots with attention button
3) Slots with no button where we expect a software UI, e.g., Taku's box
4) Devices with no actual slot, no button, etc., e.g., Rajat's system
We handle these slightly differently, implicitly relying on various
capability tests scattered throughout the code. I think we should be
able to come up with a scheme that would make this more explicit and
make pciehp simpler and more consistent.
Bjorn
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-14 17:31 ` Bjorn Helgaas
@ 2014-02-14 19:39 ` Rajat Jain
2014-02-18 23:02 ` Bjorn Helgaas
2014-02-25 3:02 ` Rajat Jain
0 siblings, 2 replies; 16+ messages in thread
From: Rajat Jain @ 2014-02-14 19:39 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Izumi, Taku, Rajat Jain, linux-pci@vger.kernel.org,
yinghai@kernel.org, Guenter Roeck, Takashi Iwai
Hi Bjorn,
On Fri, Feb 14, 2014 at 9:31 AM, Bjorn Helgaas <bhelgaas@google.com> wrote:
> On Fri, Feb 14, 2014 at 12:21 AM, Izumi, Taku <izumi.taku@jp.fujitsu.com> wrote:
>>> Hmm... I see that the Slot has a power controller. Which means that the power to the slot shall not be turned on automatically
>>> (by HW) when the card is plugged in. Also meaning that the link will not come up automatically - so this does not seem
>>> like the Link state based hotplug kicking in.
>>>
>>> What I suspect is this one:
>>>
>>> f02d1843d83b "PCI: pciehp: Remove surprise bit checks"
>>
>> You are right.
>> In case of omitting comit-f02d1843, it worked as expected.
>> Slot power doesn't become ON automatically when PCIe card is inserted.
>
> OK, I dropped f02d1843d83b ("PCI: pciehp: Remove surprise bit
> checks").
I think part of this commit was still good (The part that drops the
surprise check when a card is yanked out). That is because when a card
is yanked out, it shouldn't matter whether the surprise bit is set or
not - its gotta go.
Functionally, that scenario is already covered by my patches (because
yanking out a card will make the link go down, hence kicking off link
state based unplug) - thus no functional change. But just thought I'll
mention since you were already at this cleanup phase. (If you agree, I
can send a separate clean patch or you can use Takashi's one).
> Thanks for testing, everybody!
>
> I think our handling of slot capabilities and control is a bit
> haphazard. It seems like we're mostly responding to things that
> break, and we don't really have a coherent explanation of how things
> *should* work in different configurations. I think it would be good
> if somebody wrote up something for Documentation/PCI, with references
> to the relevant specifications, that describes how we think things
> should work.
Sure, I think I'll take a stab.
Thanks,
Rajat
> For example, I think we have at least four models:
>
> 1) ExpressCard
> 2) Slots with attention button
> 3) Slots with no button where we expect a software UI, e.g., Taku's box
> 4) Devices with no actual slot, no button, etc., e.g., Rajat's system
>
> We handle these slightly differently, implicitly relying on various
> capability tests scattered throughout the code. I think we should be
> able to come up with a scheme that would make this more explicit and
> make pciehp simpler and more consistent.
>
> Bjorn
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-14 19:39 ` Rajat Jain
@ 2014-02-18 23:02 ` Bjorn Helgaas
2014-02-19 2:54 ` Rajat Jain
2014-02-25 3:02 ` Rajat Jain
1 sibling, 1 reply; 16+ messages in thread
From: Bjorn Helgaas @ 2014-02-18 23:02 UTC (permalink / raw)
To: Rajat Jain
Cc: Izumi, Taku, Rajat Jain, linux-pci@vger.kernel.org,
yinghai@kernel.org, Guenter Roeck, Takashi Iwai
On Fri, Feb 14, 2014 at 12:39 PM, Rajat Jain <rajatxjain@gmail.com> wrote:
> Hi Bjorn,
>
> On Fri, Feb 14, 2014 at 9:31 AM, Bjorn Helgaas <bhelgaas@google.com> wrote:
>> On Fri, Feb 14, 2014 at 12:21 AM, Izumi, Taku <izumi.taku@jp.fujitsu.com> wrote:
>>>> Hmm... I see that the Slot has a power controller. Which means that the power to the slot shall not be turned on automatically
>>>> (by HW) when the card is plugged in. Also meaning that the link will not come up automatically - so this does not seem
>>>> like the Link state based hotplug kicking in.
>>>>
>>>> What I suspect is this one:
>>>>
>>>> f02d1843d83b "PCI: pciehp: Remove surprise bit checks"
>>>
>>> You are right.
>>> In case of omitting comit-f02d1843, it worked as expected.
>>> Slot power doesn't become ON automatically when PCIe card is inserted.
>>
>> OK, I dropped f02d1843d83b ("PCI: pciehp: Remove surprise bit
>> checks").
>
> I think part of this commit was still good (The part that drops the
> surprise check when a card is yanked out). That is because when a card
> is yanked out, it shouldn't matter whether the surprise bit is set or
> not - its gotta go.
>
> Functionally, that scenario is already covered by my patches (because
> yanking out a card will make the link go down, hence kicking off link
> state based unplug) - thus no functional change. But just thought I'll
> mention since you were already at this cleanup phase. (If you agree, I
> can send a separate clean patch or you can use Takashi's one).
That sounds reasonable. Send me a patch, if you don't mind, so it's
clear what to do here.
Bjorn
^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-18 23:02 ` Bjorn Helgaas
@ 2014-02-19 2:54 ` Rajat Jain
0 siblings, 0 replies; 16+ messages in thread
From: Rajat Jain @ 2014-02-19 2:54 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Izumi, Taku, Rajat Jain, linux-pci@vger.kernel.org,
yinghai@kernel.org, Guenter Roeck, Takashi Iwai
On Tue, Feb 18, 2014 at 3:02 PM, Bjorn Helgaas <bhelgaas@google.com> wrote:
> On Fri, Feb 14, 2014 at 12:39 PM, Rajat Jain <rajatxjain@gmail.com> wrote:
>> Hi Bjorn,
>>
>> On Fri, Feb 14, 2014 at 9:31 AM, Bjorn Helgaas <bhelgaas@google.com> wrote:
>>> On Fri, Feb 14, 2014 at 12:21 AM, Izumi, Taku <izumi.taku@jp.fujitsu.com> wrote:
>>>>> Hmm... I see that the Slot has a power controller. Which means that the power to the slot shall not be turned on automatically
>>>>> (by HW) when the card is plugged in. Also meaning that the link will not come up automatically - so this does not seem
>>>>> like the Link state based hotplug kicking in.
>>>>>
>>>>> What I suspect is this one:
>>>>>
>>>>> f02d1843d83b "PCI: pciehp: Remove surprise bit checks"
>>>>
>>>> You are right.
>>>> In case of omitting comit-f02d1843, it worked as expected.
>>>> Slot power doesn't become ON automatically when PCIe card is inserted.
>>>
>>> OK, I dropped f02d1843d83b ("PCI: pciehp: Remove surprise bit
>>> checks").
>>
>> I think part of this commit was still good (The part that drops the
>> surprise check when a card is yanked out). That is because when a card
>> is yanked out, it shouldn't matter whether the surprise bit is set or
>> not - its gotta go.
>>
>> Functionally, that scenario is already covered by my patches (because
>> yanking out a card will make the link go down, hence kicking off link
>> state based unplug) - thus no functional change. But just thought I'll
>> mention since you were already at this cleanup phase. (If you agree, I
>> can send a separate clean patch or you can use Takashi's one).
>
> That sounds reasonable. Send me a patch, if you don't mind, so it's
> clear what to do here.
Just sent.
Thanks,
Rajat
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty
2014-02-14 19:39 ` Rajat Jain
2014-02-18 23:02 ` Bjorn Helgaas
@ 2014-02-25 3:02 ` Rajat Jain
1 sibling, 0 replies; 16+ messages in thread
From: Rajat Jain @ 2014-02-25 3:02 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: Izumi, Taku, Rajat Jain, linux-pci@vger.kernel.org,
yinghai@kernel.org, Guenter Roeck, Takashi Iwai
Hello Bjorn,
>>
>> I think our handling of slot capabilities and control is a bit
>> haphazard. It seems like we're mostly responding to things that
>> break, and we don't really have a coherent explanation of how things
>> *should* work in different configurations. I think it would be good
>> if somebody wrote up something for Documentation/PCI, with references
>> to the relevant specifications, that describes how we think things
>> should work.
>
> Sure, I think I'll take a stab.
>
> Thanks,
>
> Rajat
>
>> For example, I think we have at least four models:
>>
>> 1) ExpressCard
>> 2) Slots with attention button
>> 3) Slots with no button where we expect a software UI, e.g., Taku's box
>> 4) Devices with no actual slot, no button, etc., e.g., Rajat's system
>>
I'm trying to come up with a write up for this. And am trying to
understand what differentiates (1) from others - from the view of use
case model of course. I briefly looked at the ExpressCard specs at
http://www.usb.org/developers/expresscard/EC_specifications/ExpressCard_2_0_FINAL.pdf
I understand that ExpressCard shall be an actual slot and of course
has a defined form factor etc, but, when I think of the _use case_
that the user is expected to follow, it shall be pretty much dependent
on the HP elements. For e.g, if there is attention button, it would
follow (2), but if link comes up automatically (no power controller
etc), then it would follow (4) etc.
Thus I think that the use cases (sequence to be followed for hotplug)
shall be more appropriately categorized based on what hot-plug
elements (button etc) are present in a system. Of course, we can give
examples ("ExpressCards are one example in this category and is
typically characterized by .. ") within those categories, while also
making references to the appropriate standards.
What do you think?
Thanks,
Rajat
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2014-02-25 3:02 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-02-03 7:07 [PATCH] PCI: pciehp: Fix the problem that the present bit is not cleared though slot is empty Taku Izumi
2014-02-12 0:49 ` Bjorn Helgaas
2014-02-12 8:00 ` Izumi, Taku
2014-02-12 16:56 ` Bjorn Helgaas
2014-02-12 18:11 ` Rajat Jain
2014-02-13 8:00 ` Izumi, Taku
2014-02-13 16:03 ` Rajat Jain
2014-02-13 16:37 ` Takashi Iwai
2014-02-13 17:56 ` Rajat Jain
2014-02-14 7:21 ` Izumi, Taku
2014-02-14 7:26 ` Rajat Jain
2014-02-14 17:31 ` Bjorn Helgaas
2014-02-14 19:39 ` Rajat Jain
2014-02-18 23:02 ` Bjorn Helgaas
2014-02-19 2:54 ` Rajat Jain
2014-02-25 3:02 ` Rajat Jain
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