From: Bjorn Helgaas <bhelgaas@google.com>
To: Yinghai Lu <yinghai@kernel.org>
Cc: Guo Chao <yan@linux.vnet.ibm.com>, linux-pci@vger.kernel.org
Subject: Re: [PATCH v4 1/3] PCI: Fix bus align checking to support more than 8G
Date: Tue, 8 Jul 2014 16:24:42 -0600 [thread overview]
Message-ID: <20140708222442.GA13700@google.com> (raw)
In-Reply-To: <1404420379-20983-1-git-send-email-yinghai@kernel.org>
On Thu, Jul 03, 2014 at 01:46:17PM -0700, Yinghai Lu wrote:
> Use 128G instead.
>
> Signed-off-by: Yinghai Lu <yinghai@kernel.org>
I applied this one to pci/resource for v3.17, thanks!
I didn't apply [2/3] or [3/3] because the questions I raised earlier
haven't been resolved.
> ---
> drivers/pci/setup-bus.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Index: linux-2.6/drivers/pci/setup-bus.c
> ===================================================================
> --- linux-2.6.orig/drivers/pci/setup-bus.c
> +++ linux-2.6/drivers/pci/setup-bus.c
> @@ -925,7 +925,7 @@ static int pbus_size_mem(struct pci_bus
> {
> struct pci_dev *dev;
> resource_size_t min_align, align, size, size0, size1;
> - resource_size_t aligns[14]; /* Alignments from 1Mb to 8Gb */
> + resource_size_t aligns[18]; /* Alignments from 1Mb to 128Gb */
> int order, max_order;
> struct resource *b_res = find_free_bus_resource(bus,
> mask | IORESOURCE_PREFETCH, type);
next prev parent reply other threads:[~2014-07-08 22:24 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-03 20:46 [PATCH v4 1/3] PCI: Fix bus align checking to support more than 8G Yinghai Lu
2014-07-03 20:46 ` [PATCH v4 2/3] PCI: Fix bus align checking with 32bit bridge pref Yinghai Lu
2014-07-03 20:46 ` [PATCH v4 3/3] PCI: Avoid size overflow for bridge 32bit resource Yinghai Lu
2014-07-08 22:24 ` Bjorn Helgaas [this message]
2014-07-08 22:50 ` [PATCH v4 1/3] PCI: Fix bus align checking to support more than 8G Yinghai Lu
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