From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx07-00178001.pphosted.com ([62.209.51.94]:58421 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752507AbaGQDcr (ORCPT ); Wed, 16 Jul 2014 23:32:47 -0400 Date: Thu, 17 Jul 2014 09:01:32 +0530 From: Pratyush Anand To: Murali Karicheri Cc: "linux-pci@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Russell King , Grant Likely , Rob Herring , Bjorn Helgaas , Richard Zhu , Kishon Vijay Abraham I , Marek Vasut , Arnd Bergmann , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Randy Dunlap Subject: Re: [PATCH v5 2/5] PCI: designware: refactor MSI code to work with v3.65 dw hardware Message-ID: <20140717033132.GH12278@pratyush-vbox> References: <1405528686-16539-1-git-send-email-m-karicheri2@ti.com> <1405528686-16539-3-git-send-email-m-karicheri2@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" In-Reply-To: <1405528686-16539-3-git-send-email-m-karicheri2@ti.com> Sender: linux-pci-owner@vger.kernel.org List-ID: On Thu, Jul 17, 2014 at 12:38:03AM +0800, Murali Karicheri wrote: > Keystone PCI controller is based on v3.65 version of the DW > PCI h/w that implements MSI controller registers in application > space compared to the newer version. This requires updates to > the DW core API to support the PCI controller driver based on > this old DW hardware. Add msi_irq_set()/clear() API functions to > allow Set/Clear MSI IRQ enable bit in the application register. > Also the old h/w uses MSI_IRQ register in application register > space to raise MSI IRQ to the RC from EP. Current code uses the > standard mechanism as per PCI spec. So add another API get_msi_data() > to get the address of this register so that common code can be > re-used on old h/w. > > Signed-off-by: Murali Karicheri > Acked-by: Mohit Kumar > Acked-by: Jingoo Han > Acked-by: Santosh Shilimkar > Reviewed-by: Pratyush Anand