From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx08-00178001.pphosted.com ([91.207.212.93]:46080 "EHLO mx08-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750833AbaICFUz (ORCPT ); Wed, 3 Sep 2014 01:20:55 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.14.5/8.14.5) with SMTP id s835IUGY003844 for ; Wed, 3 Sep 2014 07:20:53 +0200 Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx08-00178001.pphosted.com with ESMTP id 1p5v5jr573-1 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT) for ; Wed, 03 Sep 2014 07:20:53 +0200 Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 9123221 for ; Wed, 3 Sep 2014 05:20:49 +0000 (GMT) Received: from Webmail-ap.st.com (eapex1hubcas4.st.com [10.80.176.69]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 8B7CBB2B for ; Wed, 3 Sep 2014 05:20:48 +0000 (GMT) Date: Wed, 3 Sep 2014 10:50:35 +0530 From: Pratyush Anand To: Mohit KUMAR DCG Cc: "linux-pci@vger.kernel.org" Subject: Re: [PATCH] PCIe: SPEAr13XX: Pass config resource through reg property Message-ID: <20140903052035.GA2693@pratyush-vbox> References: <2CC2A0A4A178534D93D5159BF3BCB661A70E51E466@EAPEX1MAIL1.st.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" In-Reply-To: <2CC2A0A4A178534D93D5159BF3BCB661A70E51E466@EAPEX1MAIL1.st.com> Sender: linux-pci-owner@vger.kernel.org List-ID: On Wed, Sep 03, 2014 at 01:01:00PM +0800, Mohit KUMAR DCG wrote: > Hello Pratyush, > > > -----Original Message----- > > From: Pratyush ANAND > > Sent: Thursday, August 28, 2014 9:01 AM > > To: Mohit KUMAR DCG > > Cc: linux-pci@vger.kernel.org; Pratyush ANAND > > Subject: [PATCH] PCIe: SPEAr13XX: Pass config resource through reg > > property > > > > PCIe configuration space should be passed through reg property, rather than > > through ranges property. This patch does the correction for SPEAr13XX SOCs. > > > > Signed-off-by: Pratyush Anand > > --- > > arch/arm/boot/dts/spear1310.dtsi | 18 +++++++++--------- > > arch/arm/boot/dts/spear1340.dtsi | 6 +++--- drivers/pci/host/pcie- > > spear13xx.c | 2 +- > > 3 files changed, 13 insertions(+), 13 deletions(-) > > > > diff --git a/arch/arm/boot/dts/spear1310.dtsi > > b/arch/arm/boot/dts/spear1310.dtsi > > index fa5f2bb5f106..51de3876caf4 100644 > > --- a/arch/arm/boot/dts/spear1310.dtsi > > +++ b/arch/arm/boot/dts/spear1310.dtsi > > @@ -85,7 +85,8 @@ > > > > pcie0: pcie@b1000000 { > > compatible = "st,spear1340-pcie", "snps,dw-pcie"; > > - reg = <0xb1000000 0x4000>; > > + reg = <0xb1000000 0x4000>, <0x80000000 0x20000>; > > + reg-names = "dbi", "config"; > > interrupts = <0 68 0x4>; > > interrupt-map-mask = <0 0 0 0>; > > interrupt-map = <0x0 0 &gic 0 68 0x4>; @@ -95,15 > > +96,15 @@ > > #address-cells = <3>; > > #size-cells = <2>; > > device_type = "pci"; > > - ranges = <0x00000800 0 0x80000000 0x80000000 0 > > 0x00020000 /* configuration space */ > > - 0x81000000 0 0 0x80020000 0 0x00010000 /* > > downstream I/O */ > > + ranges = <0x81000000 0 0 0x80020000 0 > > 0x00010000 /* downstream I/O */ > > 0x82000000 0 0x80030000 0xc0030000 0 > > 0x0ffd0000>; /* non-prefetchable memory */ > > status = "disabled"; > > }; > > > > pcie1: pcie@b1800000 { > > compatible = "st,spear1340-pcie", "snps,dw-pcie"; > > - reg = <0xb1800000 0x4000>; > > + reg = <0xb1000000 0x4000>, <0x90000000 0x20000>; > > - should be reg = <0xb18000000 0x4000>, <0x90000000 0x20000>; > > > + reg-names = "dbi", "config"; > > interrupts = <0 69 0x4>; > > interrupt-map-mask = <0 0 0 0>; > > interrupt-map = <0x0 0 &gic 0 69 0x4>; @@ -113,15 > > +114,15 @@ > > #address-cells = <3>; > > #size-cells = <2>; > > device_type = "pci"; > > - ranges = <0x00000800 0 0x90000000 0x90000000 0 > > 0x00020000 /* configuration space */ > > - 0x81000000 0 0 0x90020000 0 0x00010000 /* > > downstream I/O */ > > + ranges = <0x81000000 0 0 0x90020000 0 0x00010000 > > /* downstream I/O */ > > 0x82000000 0 0x90030000 0x90030000 0 > > 0x0ffd0000>; /* non-prefetchable memory */ > > status = "disabled"; > > }; > > > > pcie2: pcie@b4000000 { > > compatible = "st,spear1340-pcie", "snps,dw-pcie"; > > - reg = <0xb4000000 0x4000>; > > + reg = <0xb1000000 0x4000>, <0xc0000000 0x20000>; > > - should be reg = <0xb4000000 0x4000>, <0xc0000000 0x20000>; oops..will send v2. ~Pratyush > > Otherwise looks good and removes warning "spear-pcie b4000000.pcie: missing > *config* reg space", now config space is passed as reg property. > > Thanks > Mohit