From: Tejun Heo <tj@kernel.org>
To: Chuansheng Liu <chuansheng.liu@intel.com>
Cc: bhelgaas@google.com, aaron.lu@intel.com, rjw@rjwysocki.net,
mister.freeman@laposte.net, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI: Do not enable async suspend for JMicron chips
Date: Wed, 5 Nov 2014 11:31:59 -0500 [thread overview]
Message-ID: <20141105163159.GE14386@htj.dyndns.org> (raw)
In-Reply-To: <1415149665-26669-1-git-send-email-chuansheng.liu@intel.com>
On Wed, Nov 05, 2014 at 09:07:45AM +0800, Chuansheng Liu wrote:
> The JMicron chip 361/363/368 contains one SATA controller and
> one PATA controller, they are brother-relation ship in PCI tree,
> but for powering on these both controller, we must follow the
> sequence one by one, otherwise one of them can not be powered on
> successfully.
>
> So here we disable the async suspend method for Jmicron chip.
>
> Cc: stable@vger.kernel.org # 3.15+
> Signed-off-by: Chuansheng Liu <chuansheng.liu@intel.com>
Applied to libata/for-3.18-fixes.
Thanks.
--
tejun
next prev parent reply other threads:[~2014-11-05 16:32 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-05 1:07 [PATCH] PCI: Do not enable async suspend for JMicron chips Chuansheng Liu
2014-11-05 1:33 ` Aaron Lu
2014-11-05 1:35 ` Aaron Lu
2014-11-05 16:31 ` Tejun Heo [this message]
2014-11-05 17:58 ` Barto
2014-11-05 18:04 ` Tejun Heo
-- strict thread matches above, loose matches on Subject: below --
2014-11-05 1:31 Chuansheng Liu
2014-11-05 18:01 ` Bjorn Helgaas
2014-11-05 18:46 ` Barto
2014-11-05 19:03 ` Bjorn Helgaas
2014-11-06 1:36 ` Barto
2014-11-06 1:48 ` Liu, Chuansheng
2014-11-06 4:08 ` Bjorn Helgaas
2014-11-06 5:29 ` Barto
2014-11-06 5:29 ` Liu, Chuansheng
2014-11-06 5:36 ` Aaron Lu
2014-11-06 6:39 ` Liu, Chuansheng
2014-11-06 8:25 ` Barto
2014-11-06 17:39 ` Bjorn Helgaas
2014-11-06 21:02 ` Barto
2014-11-07 1:09 ` Liu, Chuansheng
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