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From: Tejun Heo <tj@kernel.org>
To: Chuansheng Liu <chuansheng.liu@intel.com>
Cc: bhelgaas@google.com, rjw@rjwysocki.net,
	mister.freeman@laposte.net, aaron.lu@intel.com,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-pm@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH] PCI: Add disabling pm async quirk for JMicron chips
Date: Fri, 5 Dec 2014 09:45:44 -0500	[thread overview]
Message-ID: <20141205144544.GH4080@htj.dyndns.org> (raw)
In-Reply-To: <1417763857-11993-1-git-send-email-chuansheng.liu@intel.com>

On Fri, Dec 05, 2014 at 03:17:37PM +0800, Chuansheng Liu wrote:
>  DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB360, quirk_jmicron_ata);
>  DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, quirk_jmicron_ata);
>  DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB362, quirk_jmicron_ata);
> @@ -1519,6 +1534,8 @@ DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB3
>  DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, quirk_jmicron_ata);
>  DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368, quirk_jmicron_ata);
>  DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB369, quirk_jmicron_ata);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_JMICRON, PCI_ANY_ID,
> +		pci_async_suspend_fixup);

Why is this being done through pci quirks?  e6b7e41cdd8 implements the
same quirk in the respective drivers.  What's the difference here?

Thanks.

-- 
tejun

  reply	other threads:[~2014-12-05 14:45 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-05  7:17 [PATCH] PCI: Add disabling pm async quirk for JMicron chips Chuansheng Liu
2014-12-05 14:45 ` Tejun Heo [this message]
2014-12-05 16:41   ` Barto
2014-12-05 19:18 ` Alan Stern
2015-01-09 17:46   ` Bjorn Helgaas
2015-05-11  6:58     ` Aaron Lu

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