From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Wed, 20 May 2015 15:03:30 -0500 From: Bjorn Helgaas To: Jisheng Zhang Cc: jg1.han@samsung.com, Minghuan.Lian@freescale.com, fabrice.gasnier@st.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Pratyush Anand Subject: Re: [PATCH v2 0/2] PCI: designware: improve iATU programming and usage Message-ID: <20150520200330.GB32152@google.com> References: <1430382149-1645-1-git-send-email-jszhang@marvell.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <1430382149-1645-1-git-send-email-jszhang@marvell.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: [+cc Pratyush] On Thu, Apr 30, 2015 at 04:22:27PM +0800, Jisheng Zhang wrote: > The outbound iATU programming functions are similar, so PATCH1 consolidates > them into one. > > Most transactions' type are cfg0 and MEM, so current iATU usage is not > balanced. PATCH2 adopts idea from Minghuan Lian : > > http://www.spinics.net/lists/linux-pci/msg40440.html > > to change the iATU allocation: iATU0 for cfg and IO, iATU1 for MEM. > > Changes since v1: > - remove outbound iATU programming for IO in dw_pcie_host_init, since it can > be done by berlin_pcie_{rd|wr}_other_conf() latter. > - only do outbound iATU programming for MEM if pp->ops->rd_other_conf is not > set. Thank Fabrice Gasnier to point out "some platforms doesn't have support > for ATU" > > Jisheng Zhang (2): > PCI: designware: consolidate outbound iATU programming functions > PCI: designware: use iATU0 for cfg and IO, iATU1 for MEM > > drivers/pci/host/pcie-designware.c | 142 ++++++++++++++++--------------------- Applied both with Pratyush's ack to pci/host-designware for v4.2, thanks!