From: Will Deacon <will.deacon@arm.com>
To: Hanjun Guo <hanjun.guo@linaro.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Arnd Bergmann <arnd@arndb.de>,
Catalin Marinas <Catalin.Marinas@arm.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Jiang Liu <jiang.liu@linux.intel.com>,
Liviu Dudau <Liviu.Dudau@arm.com>,
Thomas Gleixner <tglx@linutronix.de>,
Yijing Wang <wangyijing@huawei.com>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
Tomasz Nowicki <tomasz.nowicki@linaro.org>,
"suravee.suthikulpanit@amd.com" <suravee.suthikulpanit@amd.com>,
"msalter@redhat.com" <msalter@redhat.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linaro-acpi@lists.linaro.org" <linaro-acpi@lists.linaro.org>
Subject: Re: [PATCH 11/11] ARM64 / PCI / ACPI: support for ACPI based PCI hostbridge init
Date: Tue, 26 May 2015 18:13:50 +0100 [thread overview]
Message-ID: <20150526171350.GV1565@arm.com> (raw)
In-Reply-To: <1432644564-24746-12-git-send-email-hanjun.guo@linaro.org>
On Tue, May 26, 2015 at 01:49:24PM +0100, Hanjun Guo wrote:
> Based on Jiang Liu's common interface to support PCI host bridge
> init and refactoring of MMCONFIG, this patch using information
> from ACPI MCFG table and IO/irq resources from _CRS to init
> ARM64 PCI hostbridge, then PCI will work on ARM64.
>
> This patch is based on Mark Salter and Tomasz Nowicki's work.
>
> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
> Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
> CC: Arnd Bergmann <arnd@arndb.de>
> CC: Catalin Marinas <catalin.marinas@arm.com>
> CC: Liviu Dudau <Liviu.Dudau@arm.com>
> CC: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
> CC: Will Deacon <will.deacon@arm.com>
> ---
> arch/arm64/Kconfig | 7 ++
> arch/arm64/kernel/pci.c | 245 +++++++++++++++++++++++++++++++++++++++++++++---
> drivers/pci/pci.c | 26 +++--
> 3 files changed, 257 insertions(+), 21 deletions(-)
>
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 9b80428..8e4b789 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -276,6 +276,13 @@ config PCI_DOMAINS_GENERIC
> config PCI_SYSCALL
> def_bool PCI
>
> +config PCI_MMCONFIG
> + def_bool y
> + select PCI_ECAM
> + select HAVE_PCI_ECAM
> + select GENERIC_PCI_ECAM
> + depends on ACPI
> +
> source "drivers/pci/Kconfig"
> source "drivers/pci/pcie/Kconfig"
> source "drivers/pci/hotplug/Kconfig"
> diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
> index 4095379..d1629dc 100644
> --- a/arch/arm64/kernel/pci.c
> +++ b/arch/arm64/kernel/pci.c
> @@ -11,12 +11,15 @@
> */
>
> #include <linux/acpi.h>
> +#include <linux/ecam.h>
> #include <linux/init.h>
> #include <linux/io.h>
> #include <linux/kernel.h>
> #include <linux/mm.h>
> +#include <linux/of_address.h>
> #include <linux/of_pci.h>
> #include <linux/of_platform.h>
> +#include <linux/pci-acpi.h>
> #include <linux/slab.h>
>
> #include <asm/pci-bridge.h>
> @@ -43,31 +46,251 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,
> */
> int pcibios_add_device(struct pci_dev *dev)
> {
> - dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
> + if (acpi_disabled)
> + dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
>
> return 0;
> }
>
> +#ifdef CONFIG_ACPI
> +int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
> +{
> + struct pci_controller *sd = bridge->bus->sysdata;
> +
> + ACPI_COMPANION_SET(&bridge->dev, sd->companion);
> + return 0;
> +}
> +
> +void pcibios_add_bus(struct pci_bus *bus)
> +{
> + acpi_pci_add_bus(bus);
> +}
> +
> +void pcibios_remove_bus(struct pci_bus *bus)
> +{
> + acpi_pci_remove_bus(bus);
> +}
> +
> +int pcibios_enable_irq(struct pci_dev *dev)
> +{
> + if (!pci_dev_msi_enabled(dev))
> + acpi_pci_irq_enable(dev);
> + return 0;
> +}
> +
> +int pcibios_disable_irq(struct pci_dev *dev)
> +{
> + if (!pci_dev_msi_enabled(dev))
> + acpi_pci_irq_disable(dev);
> + return 0;
> +}
> +
> +int pcibios_enable_device(struct pci_dev *dev, int bars)
> +{
> + int err;
> +
> + err = pci_enable_resources(dev, bars);
> + if (err < 0)
> + return err;
> +
> + return pcibios_enable_irq(dev);
> +}
> +
> +static int __init pcibios_assign_resources(void)
> +{
> + struct pci_bus *root_bus;
> +
> + if (acpi_disabled)
> + return 0;
> +
> + list_for_each_entry(root_bus, &pci_root_buses, node) {
> + pcibios_resource_survey_bus(root_bus);
> + pci_assign_unassigned_root_bus_resources(root_bus);
> + }
> + return 0;
> +}
I'm starting to sound like a stuck record (and getting bored of it
myself!), but none of this looks arch-specific. Can it be moved into the
core?
Will
next prev parent reply other threads:[~2015-05-26 17:13 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-26 12:49 [PATCH 00/11] ARM64 PCI hostbridge init based on ACPI Hanjun Guo
2015-05-26 12:49 ` [PATCH 01/11] ARM64 / PCI: introduce struct pci_controller for ACPI Hanjun Guo
2015-05-26 16:58 ` Liviu Dudau
2015-05-26 17:20 ` Jiang Liu
2015-05-27 8:21 ` Hanjun Guo
2015-09-07 4:14 ` Ganapatrao Kulkarni
2015-09-07 8:45 ` Lorenzo Pieralisi
2015-09-08 13:35 ` Hanjun Guo
2015-05-27 9:47 ` Liviu Dudau
2015-05-27 11:29 ` Jiang Liu
2015-05-26 12:49 ` [PATCH 02/11] x86, pci: Clean up comment about buggy MMIO config space access for AMD Fam10h CPUs Hanjun Guo
2015-08-31 12:04 ` Tomasz Nowicki
2015-05-26 12:49 ` [PATCH 03/11] x86, pci: Abstract PCI config accessors and use AMD Fam10h workaround exclusively Hanjun Guo
2015-05-26 12:49 ` [PATCH 04/11] x86, pci: Reorder logic of pci_mmconfig_insert() function Hanjun Guo
2015-05-26 12:49 ` [PATCH 05/11] x86, pci, acpi: Move arch-agnostic MMCONFIG (aka ECAM) and ACPI code out of arch/x86/ directory Hanjun Guo
2015-05-26 17:08 ` Will Deacon
2015-05-27 8:06 ` Tomasz Nowicki
2015-06-02 13:32 ` Lorenzo Pieralisi
2015-06-04 9:28 ` Hanjun Guo
2015-06-04 10:22 ` Lorenzo Pieralisi
2015-06-04 12:28 ` Hanjun Guo
2015-06-08 2:57 ` Hanjun Guo
2015-06-08 15:14 ` Lorenzo Pieralisi
2015-08-31 11:01 ` Tomasz Nowicki
2015-09-07 9:59 ` Tomasz Nowicki
2015-09-08 15:07 ` Lorenzo Pieralisi
2015-09-09 13:47 ` Tomasz Nowicki
2015-09-11 11:20 ` Lorenzo Pieralisi
2015-09-11 12:35 ` Tomasz Nowicki
2015-09-14 9:37 ` Lorenzo Pieralisi
2015-09-14 11:34 ` Tomasz Nowicki
2015-09-14 14:55 ` Tomasz Nowicki
2015-09-25 16:02 ` Tomasz Nowicki
2015-09-25 16:19 ` Lorenzo Pieralisi
2015-10-15 13:22 ` Lorenzo Pieralisi
2015-10-15 14:34 ` Tomasz Nowicki
2015-10-15 16:26 ` Marc Zyngier
2015-10-15 18:51 ` Tomasz Nowicki
2015-05-26 12:49 ` [PATCH 06/11] pci, acpi, mcfg: Provide generic implementation of MCFG code initialization Hanjun Guo
2015-05-26 12:49 ` [PATCH 07/11] x86, pci: mmconfig_{32,64}.c code refactoring - remove code duplication Hanjun Guo
2015-05-26 12:49 ` [PATCH 08/11] x86, pci, ecam: mmconfig_64.c becomes default implementation for ECAM driver Hanjun Guo
2015-05-26 12:49 ` [PATCH 09/11] pci, acpi, mcfg: Share ACPI PCI config space accessors Hanjun Guo
2015-05-26 12:49 ` [PATCH 10/11] XEN / PCI: Remove the dependence on arch x86 when PCI_MMCONFIG=y Hanjun Guo
2015-05-26 13:54 ` Boris Ostrovsky
2015-05-26 14:00 ` Boris Ostrovsky
2015-05-26 14:54 ` Tomasz Nowicki
2015-05-26 15:44 ` Boris Ostrovsky
2015-05-27 3:55 ` Hanjun Guo
2015-05-26 12:49 ` [PATCH 11/11] ARM64 / PCI / ACPI: support for ACPI based PCI hostbridge init Hanjun Guo
2015-05-26 15:12 ` Tomasz Nowicki
2015-05-27 7:31 ` Hanjun Guo
2015-05-26 17:13 ` Will Deacon [this message]
2015-05-26 17:24 ` Jiang Liu
2015-05-27 0:30 ` [PATCH 00/11] ARM64 PCI hostbridge init based on ACPI Rafael J. Wysocki
2015-05-27 3:57 ` Hanjun Guo
2015-06-08 12:05 ` Jagan Teki
2015-06-10 2:47 ` Hanjun Guo
2015-10-15 19:15 ` Jon Masters
2015-10-15 23:42 ` Hanjun Guo
2015-10-15 23:49 ` Jon Masters
2015-12-07 20:29 ` Bjorn Helgaas
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