From: Will Deacon <will.deacon@arm.com>
To: David Daney <ddaney@caviumnetworks.com>
Cc: David Daney <ddaney.cavm@gmail.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Frank Rowand <frowand.list@gmail.com>,
"grant.likely@linaro.org" <grant.likely@linaro.org>,
Bjorn Helgaas <bhelgaas@google.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
Pawel Moll <Pawel.Moll@arm.com>,
Mark Rutland <Mark.Rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
David Daney <david.daney@cavium.com>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>
Subject: Re: [PATCH 4/6] PCI: generic: Correct, and avoid overflow, in bus_max calculation.
Date: Wed, 16 Sep 2015 11:41:53 +0100 [thread overview]
Message-ID: <20150916104152.GC28771@arm.com> (raw)
In-Reply-To: <55F86764.4060502@caviumnetworks.com>
On Tue, Sep 15, 2015 at 07:45:56PM +0100, David Daney wrote:
> On 09/15/2015 11:35 AM, Will Deacon wrote:
> > On Tue, Sep 15, 2015 at 07:02:54PM +0100, David Daney wrote:
> >> On 09/15/2015 10:49 AM, Will Deacon wrote:
> >>> On Sat, Sep 12, 2015 at 12:21:57AM +0100, David Daney wrote:
> >>>> /* Limit the bus-range to fit within reg */
> >>>> - bus_max = pci->cfg.bus_range->start +
> >>>> - (resource_size(&pci->cfg.res) >> pci->cfg.ops.bus_shift) - 1;
> >>>> + bus_max = (resource_size(&pci->cfg.res) >> pci->cfg.ops.bus_shift) - 1;
> >>>> + if (bus_max > 255)
> >>>> + bus_max = 255;
> >>>> pci->cfg.bus_range->end = min_t(resource_size_t,
> >>>> pci->cfg.bus_range->end, bus_max);
> >>>
> >>> Hmm, this is changing the meaning of the bus-range property in the
> >>> device-tree, which really needs to match what IEEE Std 1275-1994 requires.
> >>
> >> I doesn't change the bus-range.
> >
> > Not directly, but pci->cfg.bus_range is a resource populated from the
> > "bus-range" property in the device-tree, so it's changing how the driver
> > uses that property.
> >
> >>> My understanding was that the bus-range could be used to offset the config
> >>> space, which is why it's subtracted from the bus number in
> >>> gen_pci_map_cfg_bus_[e]cam.
> >>
> >> There is an inconsistency in the current code. The calculation of the
> >> cfg.win[?] pointers is done such that the beginning of the config space
> >> specified in the "reg" property corresponds to bus 0.
> >
> > I don't follow you here. The mapping functions explicitly subtract the
> > start of the bus range when calculating the window offset:
> >
> > resource_size_t idx = bus->number - pci->cfg.bus_range->start;
> >
> > so if I have bus-range = <128 255>; then bus 128 lives at the start of
> > the configuration space described by the reg property, not bus 0.
> >
> > Sorry if I'm being thick; I just can't see the inconsistency.
> >
>
> Here is the current code:
>
> >> bus_range = pci->cfg.bus_range;
> >> for (busn = bus_range->start; busn <= bus_range->end; ++busn) {
> >> u32 idx = busn - bus_range->start;
>
> The index is offset by the bus range start...
>
> >> u32 sz = 1 << pci->cfg.ops.bus_shift;
> >>
> >> pci->cfg.win[idx] = devm_ioremap(dev,
> >> pci->cfg.res.start + busn * sz,
> >> sz);
>
> But, the offset into the "reg" property is the raw bus number.
>
>
> >> if (!pci->cfg.win[idx])
> >> return -ENOMEM;
> >> }
>
>
> I hope that makes it more clear.
Got it. So we should be using idx instead of busn in the devm_ioremap
call above.
Will
next prev parent reply other threads:[~2015-09-16 10:41 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-11 23:21 [PATCH 0/6] PCI: generic: Misc. bug fixes and enhanced support for MSI David Daney
2015-09-11 23:21 ` [PATCH 1/6] PCI: Make global and export pdev_fixup_irq() David Daney
2015-09-11 23:21 ` [PATCH 2/6] PCI: generic: Only fixup irqs for bus we are creating David Daney
2015-09-15 17:36 ` Will Deacon
2015-09-15 17:49 ` David Daney
2015-09-16 10:32 ` Lorenzo Pieralisi
2015-09-17 17:13 ` David Daney
2015-09-11 23:21 ` [PATCH 3/6] PCI: generic: Quit clobbering our pci_ops David Daney
2015-09-15 17:40 ` Will Deacon
2015-09-11 23:21 ` [PATCH 4/6] PCI: generic: Correct, and avoid overflow, in bus_max calculation David Daney
2015-09-15 17:49 ` Will Deacon
2015-09-15 18:02 ` David Daney
2015-09-15 18:35 ` Will Deacon
2015-09-15 18:45 ` David Daney
2015-09-16 10:41 ` Will Deacon [this message]
2015-09-16 11:28 ` Lorenzo Pieralisi
2015-09-16 17:29 ` Will Deacon
2015-09-16 17:39 ` David Daney
2015-09-11 23:21 ` [PATCH 5/6] PCI: generic: Pass proper starting bus number to pci_scan_root_bus() David Daney
2015-09-15 17:55 ` Will Deacon
2015-09-11 23:21 ` [PATCH 6/6] PCI: generic: Allow bus default MSI controller to be specified David Daney
2015-09-15 17:53 ` Will Deacon
2015-09-15 18:25 ` David Daney
2015-09-15 18:06 ` [PATCH 0/6] PCI: generic: Misc. bug fixes and enhanced support for MSI David Daney
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