Re: [PATCH v7 39/50] powerpc/powernv: Fundamental reset in pnv_pci_reset_secondary_bus()

Gavin Shan
2015-11-13T00:21:19Z

On Fri, Nov 13, 2015 at 11:08:29AM +1100, Daniel Axtens wrote:
>Gavin Shan <gwshan@linux.vnet.ibm.com> writes:
>
>> void pnv_pci_reset_secondary_bus(struct pci_dev *dev)
>> {
>> - pnv_eeh_bridge_reset(dev, EEH_RESET_HOT);
>> + int option, freset = 0;
>> +
>> + if (dev->subordinate)
>> + pci_walk_bus(dev->subordinate,
>> + pnv_pci_dev_reset_type, &freset);
>> +
>> + option = freset ? EEH_RESET_FUNDAMENTAL : EEH_RESET_HOT;
>> + pnv_eeh_bridge_reset(dev, option);
>
>According to the skiboot sources, fundamental reset isn't supported on
>p5ioc2. As far as I can tell from your corresponding skiboot patches,
>this is still the case after they are applied. Do we need a fallback to
>EEH_RESET_HOT in this case? Otherwise there will be no reset performed
>at all.
>
>Likewise, if the FUNDAMENTAL reset fails for any reason, should we fall
>back to a HOT reset?
>

P5IOC2 won't export any PCI slots. So kernel won't issue fundamental reset
to PCI buses on P5IOC2.

We had the failback: hot reset is picked if fundamental reset can't be
supported on the target PCI bus. In case fundamental reset fails, we
shouldn't go ahead try hot reset.

Thanks,
Gavin

>Regards,
>Daniel