From: Bjorn Helgaas <helgaas@kernel.org>
To: Andi Kleen <ak@linux.intel.com>
Cc: Andi Kleen <andi@firstfloor.org>,
bhelgaas@google.com, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, x86@kernel.org
Subject: Re: [PATCH] x86, pci: Add quirk for unsizeable Broadwell EP bar
Date: Thu, 4 Feb 2016 19:57:34 -0600 [thread overview]
Message-ID: <20160205015734.GA29929@localhost> (raw)
In-Reply-To: <20160204185442.GA4875@tassilo.jf.intel.com>
On Thu, Feb 04, 2016 at 10:54:42AM -0800, Andi Kleen wrote:
> > It sounds like these devices have some device-specific register where
> > BAR 0 is supposed to be? Setting IORESOURCE_PCI_FIXED doesn't seem
> > like the right solution to me. Even if we set that, the core still
>
> There is no actually functional register on these locations that has any side
> effects.
>
> > believes this resource corresponds to some address space consumed by
> > the device. I think we will still try to size the BAR and decode its
> > type. I think it will still show up via lspci. That's all
> > meaningless.
>
> But would actually anything use it?
You mean, would anything actually use the lspci output? I don't know,
but why would we want it to print garbage?
And the kernel certainly uses the struct resource. Setting
IORESOURCE_PCI_FIXED is not a way of saying "please ignore this
resource."
Bjorn
next prev parent reply other threads:[~2016-02-05 1:57 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-15 22:17 [PATCH] x86, pci: Add quirk for unsizeable Broadwell EP bar Andi Kleen
2016-02-04 17:41 ` Bjorn Helgaas
2016-02-04 18:54 ` Andi Kleen
2016-02-05 1:57 ` Bjorn Helgaas [this message]
2016-02-05 3:36 ` Andi Kleen
2016-02-05 16:34 ` Bjorn Helgaas
2016-02-10 22:23 ` Andi Kleen
2016-02-11 14:20 ` Bjorn Helgaas
-- strict thread matches above, loose matches on Subject: below --
2016-02-17 23:45 Andi Kleen
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