From: Bjorn Helgaas <helgaas@kernel.org>
To: Alex Williamson <alex.williamson@redhat.com>
Cc: linux-pci@vger.kernel.org, bhelgaas@google.com,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/2] PCI: Skylake PCH ACS quirks
Date: Tue, 19 Apr 2016 18:53:54 -0500 [thread overview]
Message-ID: <20160419235354.GF17863@localhost> (raw)
In-Reply-To: <20160331222828.20486.30979.stgit@gimli.home>
On Thu, Mar 31, 2016 at 04:34:26PM -0600, Alex Williamson wrote:
> Intel Skylake systems attempted to implement ACS on the PCH root
> ports, but it came out a wee bit off. As noted in the second patch
> and the datasheets from Intel, dwords were used for the ACS
> capability and control words, so we see the capabilities correctly
> but the control register is an extra 2 bytes offset. With this
> quirk we can fix the kernel, unfortunately lspci will still show
> the wrong ACS control bits though. Thanks,
>
> Alex
>
> ---
>
> Alex Williamson (2):
> PCI: Reverse standard ACS vs device specific ACS enabling
> PCI: Quirk PCH root port ACS for Sunrise Point
Wow, hard to imagine how that got through validation.
Applied to pci/virtualization for v4.7, thanks, Alex!
prev parent reply other threads:[~2016-04-19 23:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-31 22:34 [PATCH 0/2] PCI: Skylake PCH ACS quirks Alex Williamson
2016-03-31 22:34 ` [PATCH 1/2] PCI: Reverse standard ACS vs device specific ACS enabling Alex Williamson
2016-03-31 22:34 ` [PATCH 2/2] PCI: Quirk PCH root port ACS for Sunrise Point Alex Williamson
2016-04-19 23:53 ` Bjorn Helgaas [this message]
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