Re: [PATCH] PCI: Document connection between pci_power_t and hardware PM capability

[Lukas Wunner <lukas@wunner.de>]

On Sat, Jun 18, 2016 at 01:00:56PM -0500, Bjorn Helgaas wrote:
> The dev.pme_support field, pci_pm_init(), and pci_pme_capable() depend on
> the fact that the pci_power_t values (PCI_D0, PCI_D1, etc.) match the
> definition of the PME_Support field of the Power Management Capabilities
> register in the Power Management capability (see PCI Bus Power Management
> spec r1.2, sec 3.2.3).

In addition, pci_power_t is assumed to match the power state in the
PM Control and Status Register, see pci_raw_set_power_state().
The PMCSR reserves only 2 bits for the power state, so it can only
represent D0 to D3hot. If the device is in D3cold, reads from its
config space usually result in an "all ones" fabricated response.
Thus D3hot and D3cold cannot be differentiated when reading the
power state in the PMCSR, they're represented by the same value.

Best regards,

Lukas

> 
> Add a note to this effect at the pci_power_t typedef.
> 
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> ---
>  include/linux/pci.h |    4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 8597b42..85cede3 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -101,6 +101,10 @@ enum {
>  	DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
>  };
>  
> +/*
> + * pci_power_t values must match the bits in the PME_Support field of the
> + * Power Management Capabilities register in the Power Management capability.
> + */
>  typedef int __bitwise pci_power_t;
>  
>  #define PCI_D0		((pci_power_t __force) 0)
>