From: Gavin Shan <gwshan@linux.vnet.ibm.com>
To: Yongji Xie <xyjxie@linux.vnet.ibm.com>
Cc: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, linux-doc@vger.kernel.org,
bhelgaas@google.com, alex.williamson@redhat.com, aik@ozlabs.ru,
benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au,
corbet@lwn.net, warrier@linux.vnet.ibm.com,
zhong@linux.vnet.ibm.com, nikunj@linux.vnet.ibm.com,
gwshan@linux.vnet.ibm.com
Subject: Re: [PATCH v3 5/7] PCI: Do not use IORESOURCE_STARTALIGN to identify bridge resources
Date: Fri, 1 Jul 2016 12:34:23 +1000 [thread overview]
Message-ID: <20160701023423.GB6739@gwshan> (raw)
In-Reply-To: <1467283993-3185-6-git-send-email-xyjxie@linux.vnet.ibm.com>
On Thu, Jun 30, 2016 at 06:53:11PM +0800, Yongji Xie wrote:
>Now we use the IORESOURCE_STARTALIGN to identify bridge resources
>in __assign_resources_sorted(). That's quite fragile. We may also
>set flag IORESOURCE_STARTALIGN for SR-IOV resources in some cases,
>for example, using the option "noresize" of parameter
>"pci=resource_alignment".
>
>In this patch, we try to use a more robust way to identify
>bridge resources.
>
>Signed-off-by: Yongji Xie <xyjxie@linux.vnet.ibm.com>
Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Yongji, I think this doesn't have to be part of this series, meaning
it can be sent or merged separately.
>---
> drivers/pci/setup-bus.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
>diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
>index 55641a3..216ddbc 100644
>--- a/drivers/pci/setup-bus.c
>+++ b/drivers/pci/setup-bus.c
>@@ -390,6 +390,7 @@ static void __assign_resources_sorted(struct list_head *head,
> struct pci_dev_resource *dev_res, *tmp_res, *dev_res2;
> unsigned long fail_type;
> resource_size_t add_align, align;
>+ int index;
>
> /* Check if optional add_size is there */
> if (!realloc_head || list_empty(realloc_head))
>@@ -410,11 +411,13 @@ static void __assign_resources_sorted(struct list_head *head,
>
> /*
> * There are two kinds of additional resources in the list:
>- * 1. bridge resource -- IORESOURCE_STARTALIGN
>- * 2. SR-IOV resource -- IORESOURCE_SIZEALIGN
>+ * 1. bridge resource
>+ * 2. SR-IOV resource
> * Here just fix the additional alignment for bridge
> */
>- if (!(dev_res->res->flags & IORESOURCE_STARTALIGN))
>+ index = dev_res->res - dev_res->dev->resource;
>+ if (index < PCI_BRIDGE_RESOURCES ||
>+ index > PCI_BRIDGE_RESOURCE_END)
> continue;
>
> add_align = get_res_add_align(realloc_head, dev_res->res);
Thanks,
Gavin
next prev parent reply other threads:[~2016-07-01 2:34 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-30 10:53 [PATCH v3 0/7] PCI: Add support for enforcing all MMIO BARs not to share PAGE_SIZE Yongji Xie
2016-06-30 10:53 ` [PATCH v3 1/7] PCI: Ignore enforced alignment when kernel uses existing firmware setup Yongji Xie
2016-07-01 0:28 ` Gavin Shan
2016-07-01 4:49 ` Yongji Xie
2016-06-30 10:53 ` [PATCH v3 2/7] PCI: Ignore enforced alignment to VF BARs Yongji Xie
2016-07-01 0:39 ` Gavin Shan
2016-07-01 5:27 ` Yongji Xie
2016-07-01 6:05 ` Gavin Shan
2016-07-01 6:40 ` Yongji Xie
2016-07-02 0:31 ` Gavin Shan
2016-06-30 10:53 ` [PATCH v3 3/7] PCI: Do not disable memory decoding in pci_reassigndev_resource_alignment() Yongji Xie
2016-07-01 0:50 ` Gavin Shan
2016-07-01 6:35 ` Yongji Xie
2016-06-30 10:53 ` [PATCH v3 4/7] PCI: Add a new option for resource_alignment to reassign alignment Yongji Xie
2016-07-01 2:25 ` Gavin Shan
2016-07-01 6:53 ` Yongji Xie
2016-06-30 10:53 ` [PATCH v3 5/7] PCI: Do not use IORESOURCE_STARTALIGN to identify bridge resources Yongji Xie
2016-07-01 2:34 ` Gavin Shan [this message]
2016-07-01 7:04 ` Yongji Xie
2016-07-02 0:37 ` Gavin Shan
2016-06-30 10:53 ` [PATCH v3 6/7] PCI: Add support for enforcing all MMIO BARs to be page aligned Yongji Xie
2016-06-30 10:53 ` [PATCH v3 7/7] PCI: Add a macro to set default alignment for all PCI devices Yongji Xie
2016-07-12 5:09 ` [PATCH v3 0/7] PCI: Add support for enforcing all MMIO BARs not to share PAGE_SIZE Yongji Xie
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160701023423.GB6739@gwshan \
--to=gwshan@linux.vnet.ibm.com \
--cc=aik@ozlabs.ru \
--cc=alex.williamson@redhat.com \
--cc=benh@kernel.crashing.org \
--cc=bhelgaas@google.com \
--cc=corbet@lwn.net \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=mpe@ellerman.id.au \
--cc=nikunj@linux.vnet.ibm.com \
--cc=paulus@samba.org \
--cc=warrier@linux.vnet.ibm.com \
--cc=xyjxie@linux.vnet.ibm.com \
--cc=zhong@linux.vnet.ibm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox