Why MSI is limited to 32 interrupts maximum

Why MSI is limited to 32 interrupts maximum

[Bharat Kumar Gogada]

Hi

Can anyone tell why MSI interrupts are limited to maximum 32 interrupts, ev=
en though we have 16bit message data register ?

Regards,
Bharat


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Re: Why MSI is limited to 32 interrupts maximum

[Marc Zyngier]

On Sat, 15 Oct 2016 12:37:55 +0000
Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> wrote:

Hi Bharat,

> Can anyone tell why MSI interrupts are limited to maximum 32
> interrupts, even though we have 16bit message data register ?

That's the very definition of the original PCI MSI: Up to 32
consecutive interrupts per function, and a single doorbell address.
MSI-X lifts that restriction and offers up to 2048 interrupts that do
not have to be contiguous can target individual doorbells. Assuming
your MSI controller advertises MSI-X support and that your devices do
support it as well, you'll be able to enjoy those.

> 
> Regards,
> Bharat
> 
> 
> This email and any attachments are intended for the sole use of the
> named recipient(s) and contain(s) confidential information that may
> be proprietary, privileged or copyrighted under applicable law. If
> you are not the intended recipient, do not read, copy, or forward
> this email message or any attachments. Delete this email message and
> any attachments immediately.
> 

Please fix your email not to carry such disclaimer (or use a private
email address if you can't work around your company policy). Posting
confidential information on a public mailing list feels a bit silly.

Thanks,

	M.
-- 
Without deviation from the norm, progress is not possible.

RE: Why MSI is limited to 32 interrupts maximum

[Bharat Kumar Gogada]

 > On Sat, 15 Oct 2016 12:37:55 +0000
> Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> wrote:
>=20
> Hi Bharat,
>=20
> > Can anyone tell why MSI interrupts are limited to maximum 32
> > interrupts, even though we have 16bit message data register ?
>=20
> That's the very definition of the original PCI MSI: Up to 32 consecutive =
interrupts
> per function, and a single doorbell address.
> MSI-X lifts that restriction and offers up to 2048 interrupts that do not=
 have to
> be contiguous can target individual doorbells. Assuming your MSI controll=
er
> advertises MSI-X support and that your devices do support it as well, you=
'll be
> able to enjoy those.
>=20

Thanks Marc, so then only 5 bits of message data register will be used, so =
what is the purpose rest of the bits ?

> >
> > Regards,
> > Bharat
> >
> >
> > This email and any attachments are intended for the sole use of the
> > named recipient(s) and contain(s) confidential information that may be
> > proprietary, privileged or copyrighted under applicable law. If you
> > are not the intended recipient, do not read, copy, or forward this
> > email message or any attachments. Delete this email message and any
> > attachments immediately.
> >
>=20
> Please fix your email not to carry such disclaimer (or use a private emai=
l address
> if you can't work around your company policy). Posting confidential infor=
mation
> on a public mailing list feels a bit silly.
>=20
> Thanks,
>=20
> 	M.
> --
> Without deviation from the norm, progress is not possible.

Re: Why MSI is limited to 32 interrupts maximum

[okaya]

On 2016-10-15 06:30, Bharat Kumar Gogada wrote:
>> On Sat, 15 Oct 2016 12:37:55 +0000
>> Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> wrote:
>> 
>> Hi Bharat,
>> 
>> > Can anyone tell why MSI interrupts are limited to maximum 32
>> > interrupts, even though we have 16bit message data register ?
>> 
>> That's the very definition of the original PCI MSI: Up to 32 
>> consecutive interrupts
>> per function, and a single doorbell address.
>> MSI-X lifts that restriction and offers up to 2048 interrupts that do 
>> not have to
>> be contiguous can target individual doorbells. Assuming your MSI 
>> controller
>> advertises MSI-X support and that your devices do support it as well, 
>> you'll be
>> able to enjoy those.
>> 
> 
> Thanks Marc, so then only 5 bits of message data register will be
> used, so what is the purpose rest of the bits ?
> 

Data field is used to indicate which interrupt number is used. It does 
not need to start at 0.


You have 32 consecutive interrupts starting from some arbitrary base.


>> >
>> > Regards,
>> > Bharat
>> >
>> >
>> > This email and any attachments are intended for the sole use of the
>> > named recipient(s) and contain(s) confidential information that may be
>> > proprietary, privileged or copyrighted under applicable law. If you
>> > are not the intended recipient, do not read, copy, or forward this
>> > email message or any attachments. Delete this email message and any
>> > attachments immediately.
>> >
>> 
>> Please fix your email not to carry such disclaimer (or use a private 
>> email address
>> if you can't work around your company policy). Posting confidential 
>> information
>> on a public mailing list feels a bit silly.
>> 
>> Thanks,
>> 
>> 	M.
>> --
>> Without deviation from the norm, progress is not possible.
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